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Spdk/include/spdk/barrier.h

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Replace most BSD 3-clause license text with SPDX identifier. Many open source projects have moved to using SPDX identifiers to specify license information, reducing the amount of boilerplate code in every source file. This patch replaces the bulk of SPDK .c, .cpp and Makefiles with the BSD-3-Clause identifier. Almost all of these files share the exact same license text, and this patch only modifies the files that contain the most common license text. There can be slight variations because the third clause contains company names - most say "Intel Corporation", but there are instances for Nvidia, Samsung, Eideticom and even "the copyright holder". Used a bash script to automate replacement of the license text with SPDX identifier which is checked into scripts/spdx.sh. Signed-off-by: Jim Harris <james.r.harris@intel.com> Change-Id: Iaa88ab5e92ea471691dc298cfe41ebfb5d169780 Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/12904 Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com> Community-CI: Mellanox Build Bot Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Aleksey Marchuk <alexeymar@nvidia.com> Reviewed-by: Changpeng Liu <changpeng.liu@intel.com> Reviewed-by: Dong Yi <dongx.yi@intel.com> Reviewed-by: Konrad Sztyber <konrad.sztyber@intel.com> Reviewed-by: Paul Luse <paul.e.luse@intel.com> Reviewed-by: <qun.wan@intel.com>
2022-06-03 19:15:11 +00:00
/* SPDX-License-Identifier: BSD-3-Clause
update Intel copyright notices per Intel policy to include file commit date using git cmd below. The policy does not apply to non-Intel (C) notices. git log --follow -C90% --format=%ad --date default <file> | tail -1 and then pull just the 4 digit year from the result. Intel copyrights were not added to files where Intel either had no contribution ot the contribution lacked substance (ie license header updates, formatting changes, etc). Contribution date used "--follow -C95%" to get the most accurate date. Note that several files in this patch didn't end the license/(c) block with a blank comment line so these were added as the vast majority of files do have this last blank line. Simply there for consistency. Signed-off-by: paul luse <paul.e.luse@intel.com> Change-Id: Id5b7ce4f658fe87132f14139ead58d6e285c04d4 Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/15192 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Community-CI: Mellanox Build Bot
2022-11-01 20:26:26 +00:00
* Copyright (C) 2015 Intel Corporation.
barrier: ppc64 memory barriers Introduce memory barriers for ppc64. Change-Id: Ie51f959dd8d677f5af3ce6843e5304dd5e24a1e9 Signed-off-by: Jonas Pfefferle <jpf@zurich.ibm.com> Reviewed-on: https://review.gerrithub.io/383726 Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Dariusz Stojaczyk <dariuszx.stojaczyk@intel.com> Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com> Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
2017-10-10 12:19:16 +00:00
* Copyright (c) 2017, IBM Corporation.
SPDK: Initial check-in Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
2015-09-21 15:52:41 +00:00
* All rights reserved.
*/
doc: add Doxygen file marker to all public headers For existing \file markers, move them to the top of the header and tweak the wording for consistency. Change-Id: Icce748effe4dbe97d79a8c87d31caf0ee5797058 Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
2016-04-29 18:04:33 +00:00
/** \file
* Memory barriers
*/
SPDK: Initial check-in Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
2015-09-21 15:52:41 +00:00
#ifndef SPDK_BARRIER_H
#define SPDK_BARRIER_H
include: move standard includes into spdk/stdinc.h This is the first step toward isolating standard C and POSIX headers into a single replaceable header file. Change-Id: I527297f5e7260b01103018ad3429922962ee9add Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
2017-05-01 20:22:48 +00:00
#include "spdk/stdinc.h"
Add extern "C" wrapper to all public headers Also consistently place the extern "C" before any includes or other declarations in files that already had it. Change-Id: Ia316d5be3e509ec76c4a98cfa90ed516073351e0 Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
2016-02-12 14:52:35 +00:00
#ifdef __cplusplus
extern "C" {
#endif
barrier: add compiler barrier and use it in MMIO spdk_compiler_barrier() prevents the compiler from moving pointer dereferences across the barrier. Use this in the MMIO helper functions to ensure that the compiler can't reorder operations around e.g. hardware register access. Specifically, this fixes the compiler optimizing out writes to g_thread_mmio_ctrlr in the NVMe hotplug handling code. Change-Id: I6b9cec48da0e6d8d75825c28b12ece5251110080 Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
2017-02-07 00:37:18 +00:00
/** Compiler memory barrier */
#define spdk_compiler_barrier() __asm volatile("" ::: "memory")
barrier.h: add spdk_rmb These are needed in some cases on x86 where a compiler barrier is not sufficient - for example, ensuring an rdtsc instruction has executed before subsequent instructions. Signed-off-by: Jim Harris <james.r.harris@intel.com> Change-Id: I339e2dd6138ccb11b1492e70f7c724976ef3038b Reviewed-on: https://review.gerrithub.io/413145 Tested-by: SPDK Automated Test System <sys_sgsw@intel.com> Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
2018-05-31 13:02:45 +00:00
/** Read memory barrier */
barrier: cleanup the file Group all definitions for a specific architecture under a single #ifdef. This makes the code more readable. Change-Id: I4e88b9bb63f84b6275f10731aa657739ce6862e3 Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/447881 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com>
2019-03-13 08:34:10 +00:00
#define spdk_rmb() _spdk_rmb()
/** Write memory barrier */
#define spdk_wmb() _spdk_wmb()
barrier.h: add spdk_rmb These are needed in some cases on x86 where a compiler barrier is not sufficient - for example, ensuring an rdtsc instruction has executed before subsequent instructions. Signed-off-by: Jim Harris <james.r.harris@intel.com> Change-Id: I339e2dd6138ccb11b1492e70f7c724976ef3038b Reviewed-on: https://review.gerrithub.io/413145 Tested-by: SPDK Automated Test System <sys_sgsw@intel.com> Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
2018-05-31 13:02:45 +00:00
barrier.h: add some minimal docs Change-Id: Icd8af783713f80fd560092411782fe68f89b0d9a Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
2017-01-04 22:14:02 +00:00
/** Full read/write memory barrier */
barrier: cleanup the file Group all definitions for a specific architecture under a single #ifdef. This makes the code more readable. Change-Id: I4e88b9bb63f84b6275f10731aa657739ce6862e3 Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/447881 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com>
2019-03-13 08:34:10 +00:00
#define spdk_mb() _spdk_mb()
SPDK: Initial check-in Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
2015-09-21 15:52:41 +00:00
barrier: added spdk_smp_*mb to sync between cores The smp variants of memory barriers can be used in cases where the sequential order of loads/stores is required just between CPU cores. Change-Id: Ifbd187338bb441d4563672fa2f2afbe666607d76 Signed-off-by: Dariusz Stojaczyk <dariuszx.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/388765 Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
2017-11-23 12:35:15 +00:00
/** SMP read memory barrier. */
barrier: cleanup the file Group all definitions for a specific architecture under a single #ifdef. This makes the code more readable. Change-Id: I4e88b9bb63f84b6275f10731aa657739ce6862e3 Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/447881 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com>
2019-03-13 08:34:10 +00:00
#define spdk_smp_rmb() _spdk_smp_rmb()
barrier: added spdk_smp_*mb to sync between cores The smp variants of memory barriers can be used in cases where the sequential order of loads/stores is required just between CPU cores. Change-Id: Ifbd187338bb441d4563672fa2f2afbe666607d76 Signed-off-by: Dariusz Stojaczyk <dariuszx.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/388765 Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
2017-11-23 12:35:15 +00:00
/** SMP write memory barrier. */
barrier: cleanup the file Group all definitions for a specific architecture under a single #ifdef. This makes the code more readable. Change-Id: I4e88b9bb63f84b6275f10731aa657739ce6862e3 Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/447881 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com>
2019-03-13 08:34:10 +00:00
#define spdk_smp_wmb() _spdk_smp_wmb()
barrier: added spdk_smp_*mb to sync between cores The smp variants of memory barriers can be used in cases where the sequential order of loads/stores is required just between CPU cores. Change-Id: Ifbd187338bb441d4563672fa2f2afbe666607d76 Signed-off-by: Dariusz Stojaczyk <dariuszx.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/388765 Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
2017-11-23 12:35:15 +00:00
/** SMP read/write memory barrier. */
barrier: cleanup the file Group all definitions for a specific architecture under a single #ifdef. This makes the code more readable. Change-Id: I4e88b9bb63f84b6275f10731aa657739ce6862e3 Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/447881 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com>
2019-03-13 08:34:10 +00:00
#define spdk_smp_mb() _spdk_smp_mb()
nvmf/vfio-user: Fix doorbell polling not working on some ARM platform On aarch64 platforms, doorbells update from guest VM may not be seen on SPDK target side. This is because there is memory type mismatch situation here. That is on guest VM side, the doorbells are treated as device memory while on SPDK target side, it is treated as normal memory. And this situation cause problem on ARM platform. Refer to "https://developer.arm.com/documentation/102376/0100/ Memory-aliasing-and-mismatched-memory-types". Only using spdk_mb() cannot fix this. Use "dc civac" to invalidate cache may solve this. Profiling data did not show big performance degradataion. Signed-off-by: Rui Chang <rui.chang@arm.com> Change-Id: I9a18718f8c4307b3007b18c32ab02e6796548958 Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/10222 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
2021-11-11 10:15:48 +00:00
/** Invalidate data cache, input is data pointer */
#define spdk_ivdt_dcache(pdata) _spdk_ivdt_dcache(pdata)
barrier: added spdk_smp_*mb to sync between cores The smp variants of memory barriers can be used in cases where the sequential order of loads/stores is required just between CPU cores. Change-Id: Ifbd187338bb441d4563672fa2f2afbe666607d76 Signed-off-by: Dariusz Stojaczyk <dariuszx.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/388765 Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
2017-11-23 12:35:15 +00:00
#ifdef __PPC64__
barrier: cleanup the file Group all definitions for a specific architecture under a single #ifdef. This makes the code more readable. Change-Id: I4e88b9bb63f84b6275f10731aa657739ce6862e3 Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/447881 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com>
2019-03-13 08:34:10 +00:00
#define _spdk_rmb() __asm volatile("sync" ::: "memory")
#define _spdk_wmb() __asm volatile("sync" ::: "memory")
#define _spdk_mb() __asm volatile("sync" ::: "memory")
#define _spdk_smp_rmb() __asm volatile("lwsync" ::: "memory")
#define _spdk_smp_wmb() __asm volatile("lwsync" ::: "memory")
#define _spdk_smp_mb() spdk_mb()
nvmf/vfio-user: Fix doorbell polling not working on some ARM platform On aarch64 platforms, doorbells update from guest VM may not be seen on SPDK target side. This is because there is memory type mismatch situation here. That is on guest VM side, the doorbells are treated as device memory while on SPDK target side, it is treated as normal memory. And this situation cause problem on ARM platform. Refer to "https://developer.arm.com/documentation/102376/0100/ Memory-aliasing-and-mismatched-memory-types". Only using spdk_mb() cannot fix this. Use "dc civac" to invalidate cache may solve this. Profiling data did not show big performance degradataion. Signed-off-by: Rui Chang <rui.chang@arm.com> Change-Id: I9a18718f8c4307b3007b18c32ab02e6796548958 Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/10222 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
2021-11-11 10:15:48 +00:00
#define _spdk_ivdt_dcache(pdata)
barrier: cleanup the file Group all definitions for a specific architecture under a single #ifdef. This makes the code more readable. Change-Id: I4e88b9bb63f84b6275f10731aa657739ce6862e3 Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/447881 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com>
2019-03-13 08:34:10 +00:00
barrier: added spdk_smp_*mb to sync between cores The smp variants of memory barriers can be used in cases where the sequential order of loads/stores is required just between CPU cores. Change-Id: Ifbd187338bb441d4563672fa2f2afbe666607d76 Signed-off-by: Dariusz Stojaczyk <dariuszx.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/388765 Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
2017-11-23 12:35:15 +00:00
#elif defined(__aarch64__)
barrier: cleanup the file Group all definitions for a specific architecture under a single #ifdef. This makes the code more readable. Change-Id: I4e88b9bb63f84b6275f10731aa657739ce6862e3 Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/447881 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com>
2019-03-13 08:34:10 +00:00
#define _spdk_rmb() __asm volatile("dsb ld" ::: "memory")
#define _spdk_wmb() __asm volatile("dsb st" ::: "memory")
#define _spdk_mb() __asm volatile("dsb sy" ::: "memory")
#define _spdk_smp_rmb() __asm volatile("dmb ishld" ::: "memory")
#define _spdk_smp_wmb() __asm volatile("dmb ishst" ::: "memory")
#define _spdk_smp_mb() __asm volatile("dmb ish" ::: "memory")
nvmf/vfio-user: Fix doorbell polling not working on some ARM platform On aarch64 platforms, doorbells update from guest VM may not be seen on SPDK target side. This is because there is memory type mismatch situation here. That is on guest VM side, the doorbells are treated as device memory while on SPDK target side, it is treated as normal memory. And this situation cause problem on ARM platform. Refer to "https://developer.arm.com/documentation/102376/0100/ Memory-aliasing-and-mismatched-memory-types". Only using spdk_mb() cannot fix this. Use "dc civac" to invalidate cache may solve this. Profiling data did not show big performance degradataion. Signed-off-by: Rui Chang <rui.chang@arm.com> Change-Id: I9a18718f8c4307b3007b18c32ab02e6796548958 Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/10222 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
2021-11-11 10:15:48 +00:00
#define _spdk_ivdt_dcache(pdata) asm volatile("dc civac, %0" : : "r"(pdata) : "memory");
barrier: cleanup the file Group all definitions for a specific architecture under a single #ifdef. This makes the code more readable. Change-Id: I4e88b9bb63f84b6275f10731aa657739ce6862e3 Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/447881 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com>
2019-03-13 08:34:10 +00:00
#elif defined(__i386__) || defined(__x86_64__)
#define _spdk_rmb() __asm volatile("lfence" ::: "memory")
#define _spdk_wmb() __asm volatile("sfence" ::: "memory")
#define _spdk_mb() __asm volatile("mfence" ::: "memory")
#define _spdk_smp_rmb() spdk_compiler_barrier()
#define _spdk_smp_wmb() spdk_compiler_barrier()
#if defined(__x86_64__)
#define _spdk_smp_mb() __asm volatile("lock addl $0, -128(%%rsp); " ::: "memory");
barrier/x86: use lock+add for smp_mb() instead of mfence This follows smp_mb() implementation in the latest DPDK. Change-Id: I39f9259a0208579034e5ff39961a2c4b8b72975c Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/c/444041 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com>
2019-02-11 08:25:21 +00:00
#elif defined(__i386__)
barrier: cleanup the file Group all definitions for a specific architecture under a single #ifdef. This makes the code more readable. Change-Id: I4e88b9bb63f84b6275f10731aa657739ce6862e3 Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/447881 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com>
2019-03-13 08:34:10 +00:00
#define _spdk_smp_mb() __asm volatile("lock addl $0, -128(%%esp); " ::: "memory");
#endif
nvmf/vfio-user: Fix doorbell polling not working on some ARM platform On aarch64 platforms, doorbells update from guest VM may not be seen on SPDK target side. This is because there is memory type mismatch situation here. That is on guest VM side, the doorbells are treated as device memory while on SPDK target side, it is treated as normal memory. And this situation cause problem on ARM platform. Refer to "https://developer.arm.com/documentation/102376/0100/ Memory-aliasing-and-mismatched-memory-types". Only using spdk_mb() cannot fix this. Use "dc civac" to invalidate cache may solve this. Profiling data did not show big performance degradataion. Signed-off-by: Rui Chang <rui.chang@arm.com> Change-Id: I9a18718f8c4307b3007b18c32ab02e6796548958 Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/10222 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
2021-11-11 10:15:48 +00:00
#define _spdk_ivdt_dcache(pdata)
barrier: cleanup the file Group all definitions for a specific architecture under a single #ifdef. This makes the code more readable. Change-Id: I4e88b9bb63f84b6275f10731aa657739ce6862e3 Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/447881 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com>
2019-03-13 08:34:10 +00:00
barrier: RISC-V memory barriers Introduce memory barriers for RISC-V. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Change-Id: I6761c2b6ddc28a856cac1e1a67e0b0fa0e0ab3a0 Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/12878 Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com> Community-CI: Mellanox Build Bot Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Aleksey Marchuk <alexeymar@nvidia.com> Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
2022-06-02 11:46:28 +00:00
#elif defined(__riscv)
#define _spdk_rmb() __asm__ __volatile__("fence ir, ir" ::: "memory")
#define _spdk_wmb() __asm__ __volatile__("fence ow, ow" ::: "memory")
#define _spdk_mb() __asm__ __volatile__("fence iorw, iorw" ::: "memory")
#define _spdk_smp_rmb() __asm__ __volatile__("fence r, r" ::: "memory")
#define _spdk_smp_wmb() __asm__ __volatile__("fence w, w" ::: "memory")
#define _spdk_smp_mb() __asm__ __volatile__("fence rw, rw" ::: "memory")
#define _spdk_ivdt_dcache(pdata)
barrier: LOONGARCH memory barriers Implement memory barrier for LOONGARCH platforms. Change-Id: I44f5e63e6eb3f8bf98e965a22fb86f94e727061d Signed-off-by: Xue Liu <liuxue@loongson.cn> Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/16082 Community-CI: Mellanox Build Bot Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
2022-12-01 10:37:21 +00:00
#elif defined(__loongarch__)
#define _spdk_rmb() __asm volatile("dbar 0" ::: "memory")
#define _spdk_wmb() __asm volatile("dbar 0" ::: "memory")
#define _spdk_mb() __asm volatile("dbar 0" ::: "memory")
#define _spdk_smp_rmb() __asm volatile("dbar 0" ::: "memory")
#define _spdk_smp_wmb() __asm volatile("dbar 0" ::: "memory")
#define _spdk_smp_mb() __asm volatile("dbar 0" ::: "memory")
#define _spdk_ivdt_dcache(pdata)
barrier: added spdk_smp_*mb to sync between cores The smp variants of memory barriers can be used in cases where the sequential order of loads/stores is required just between CPU cores. Change-Id: Ifbd187338bb441d4563672fa2f2afbe666607d76 Signed-off-by: Dariusz Stojaczyk <dariuszx.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/388765 Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
2017-11-23 12:35:15 +00:00
#else
barrier: cleanup the file Group all definitions for a specific architecture under a single #ifdef. This makes the code more readable. Change-Id: I4e88b9bb63f84b6275f10731aa657739ce6862e3 Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/447881 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com>
2019-03-13 08:34:10 +00:00
#define _spdk_rmb()
#define _spdk_wmb()
#define _spdk_mb()
#define _spdk_smp_rmb()
#define _spdk_smp_wmb()
#define _spdk_smp_mb()
nvmf/vfio-user: Fix doorbell polling not working on some ARM platform On aarch64 platforms, doorbells update from guest VM may not be seen on SPDK target side. This is because there is memory type mismatch situation here. That is on guest VM side, the doorbells are treated as device memory while on SPDK target side, it is treated as normal memory. And this situation cause problem on ARM platform. Refer to "https://developer.arm.com/documentation/102376/0100/ Memory-aliasing-and-mismatched-memory-types". Only using spdk_mb() cannot fix this. Use "dc civac" to invalidate cache may solve this. Profiling data did not show big performance degradataion. Signed-off-by: Rui Chang <rui.chang@arm.com> Change-Id: I9a18718f8c4307b3007b18c32ab02e6796548958 Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/10222 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
2021-11-11 10:15:48 +00:00
#define _spdk_ivdt_dcache(pdata)
barrier: added spdk_smp_*mb to sync between cores The smp variants of memory barriers can be used in cases where the sequential order of loads/stores is required just between CPU cores. Change-Id: Ifbd187338bb441d4563672fa2f2afbe666607d76 Signed-off-by: Dariusz Stojaczyk <dariuszx.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/388765 Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
2017-11-23 12:35:15 +00:00
#error Unknown architecture
barrier: cleanup the file Group all definitions for a specific architecture under a single #ifdef. This makes the code more readable. Change-Id: I4e88b9bb63f84b6275f10731aa657739ce6862e3 Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/447881 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com>
2019-03-13 08:34:10 +00:00
barrier: added spdk_smp_*mb to sync between cores The smp variants of memory barriers can be used in cases where the sequential order of loads/stores is required just between CPU cores. Change-Id: Ifbd187338bb441d4563672fa2f2afbe666607d76 Signed-off-by: Dariusz Stojaczyk <dariuszx.stojaczyk@intel.com> Reviewed-on: https://review.gerrithub.io/388765 Reviewed-by: Ben Walker <benjamin.walker@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
2017-11-23 12:35:15 +00:00
#endif
Add extern "C" wrapper to all public headers Also consistently place the extern "C" before any includes or other declarations in files that already had it. Change-Id: Ia316d5be3e509ec76c4a98cfa90ed516073351e0 Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
2016-02-12 14:52:35 +00:00
#ifdef __cplusplus
}
#endif
SPDK: Initial check-in Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
2015-09-21 15:52:41 +00:00
#endif
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