Intel DC P3*** NVMe devices specify a desired stripe size, which was used for splitting I/O. Not all devices, however, specify a desired stripe size (such as the Intel DC D3*** line), and for only these devices there was a logic mistake that overwrote the maximum I/O size with a 2MB default. This patch corrects that error. Change-Id: I94b72a3a3dd1dfa18bd638daf7e01a592eb6ed17 Signed-off-by: Changpeng Liu <changpeng.liu@intel.com> Signed-off-by: Ben Walker <benjamin.walker@intel.com> |
||
---|---|---|
.. | ||
Makefile | ||
nvme_ctrlr_cmd.c | ||
nvme_ctrlr.c | ||
nvme_impl.h | ||
nvme_intel.c | ||
nvme_internal.h | ||
nvme_ns_cmd.c | ||
nvme_ns.c | ||
nvme_qpair.c | ||
nvme.c |