nvme: Fix max I/O size enforcement when no stripe size is specified

Intel DC P3*** NVMe devices specify a desired stripe size, which was
used for splitting I/O. Not all devices, however, specify a desired
stripe size (such as the Intel DC D3*** line), and for only these
devices there was a logic mistake that overwrote the maximum I/O
size with a 2MB default. This patch corrects that error.

Change-Id: I94b72a3a3dd1dfa18bd638daf7e01a592eb6ed17
Signed-off-by: Changpeng Liu <changpeng.liu@intel.com>
Signed-off-by: Ben Walker <benjamin.walker@intel.com>
This commit is contained in:
Changpeng Liu 2016-08-26 08:48:15 +08:00 committed by Ben Walker
parent c4afe2804b
commit d7120a3ee8

View File

@ -375,8 +375,6 @@ nvme_ctrlr_construct_io_qpairs(struct spdk_nvme_ctrlr *ctrlr)
*/
num_trackers = nvme_min(NVME_IO_TRACKERS, (num_entries - 1));
ctrlr->max_xfer_size = NVME_MAX_XFER_SIZE;
ctrlr->ioq = calloc(ctrlr->opts.num_io_queues, sizeof(struct spdk_nvme_qpair));
if (ctrlr->ioq == NULL)
@ -598,6 +596,7 @@ nvme_ctrlr_identify(struct spdk_nvme_ctrlr *ctrlr)
* Use MDTS to ensure our default max_xfer_size doesn't exceed what the
* controller supports.
*/
ctrlr->max_xfer_size = NVME_MAX_XFER_SIZE;
if (ctrlr->cdata.mdts > 0) {
ctrlr->max_xfer_size = nvme_min(ctrlr->max_xfer_size,
ctrlr->min_page_size * (1 << (ctrlr->cdata.mdts)));