nvme: Fix max I/O size enforcement when no stripe size is specified
Intel DC P3*** NVMe devices specify a desired stripe size, which was used for splitting I/O. Not all devices, however, specify a desired stripe size (such as the Intel DC D3*** line), and for only these devices there was a logic mistake that overwrote the maximum I/O size with a 2MB default. This patch corrects that error. Change-Id: I94b72a3a3dd1dfa18bd638daf7e01a592eb6ed17 Signed-off-by: Changpeng Liu <changpeng.liu@intel.com> Signed-off-by: Ben Walker <benjamin.walker@intel.com>
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@ -375,8 +375,6 @@ nvme_ctrlr_construct_io_qpairs(struct spdk_nvme_ctrlr *ctrlr)
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*/
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num_trackers = nvme_min(NVME_IO_TRACKERS, (num_entries - 1));
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ctrlr->max_xfer_size = NVME_MAX_XFER_SIZE;
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ctrlr->ioq = calloc(ctrlr->opts.num_io_queues, sizeof(struct spdk_nvme_qpair));
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if (ctrlr->ioq == NULL)
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@ -598,6 +596,7 @@ nvme_ctrlr_identify(struct spdk_nvme_ctrlr *ctrlr)
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* Use MDTS to ensure our default max_xfer_size doesn't exceed what the
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* controller supports.
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*/
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ctrlr->max_xfer_size = NVME_MAX_XFER_SIZE;
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if (ctrlr->cdata.mdts > 0) {
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ctrlr->max_xfer_size = nvme_min(ctrlr->max_xfer_size,
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ctrlr->min_page_size * (1 << (ctrlr->cdata.mdts)));
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