Commit Graph

156 Commits

Author SHA1 Message Date
Ben Walker
7c90a75096 nvme: Repack qpair structures
Try to group data members that are used often into the
same cache lines. We still need to find more space in the second
cache line of spdk_nvme_pcie_qpair so that the important
parts of spdk_nvme_qpair fit.

Change-Id: Ib936cb2b1acc722de7ec313d6faa3812aacde394
Signed-off-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/447968
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
2019-03-19 07:27:44 +00:00
Ben Walker
8e088c9b91 nvme: Minimize memory accesses when checking if mmio required
Don't touch the shadow doorbells if it isn't necessary.

The flag could be combined into a bit mask with other
flags in a future patch.

Change-Id: I9ffd16468d29f0f0868cf849f7fece327eb6a294
Signed-off-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/447967
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
2019-03-19 07:27:44 +00:00
Ben Walker
cf0eac8c66 nvme: Add qpair option to batch command submissions
Avoid ringing the submission queue doorbell until the
call to spdk_nvme_qpair_process_completions().

Change-Id: I7b3cd952e5ec79109eaa1c3a50f6537d7aaea51a
Signed-off-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/447239
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
2019-03-19 07:27:44 +00:00
Ben Walker
494dcc81d1 nvme: Move sq doorbell ring to a function
This is going to get called from two places shortly.

Change-Id: I2c67e719c91887987e6e65c5c0c384bed0431409
Signed-off-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/448311
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
2019-03-19 07:27:44 +00:00
Ben Walker
8b69f6b8fd nvme: Don't do a write memory barrier if we don't ring the doorbell
Change-Id: I6766ae96c155e04bc0162aa8d2e21fd096be3221
Signed-off-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/448310
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
2019-03-19 07:27:44 +00:00
lorneli
815f82b17b nvme: mv submit_tick assignments to generic qpair code
Move req->submit_tick assignments from specific transports to generic
qpair code.

Check whether submit_tick has been assigned before doing the actual
assignment, because a request may be submitted several times and the
original submit_tick shouldn't be covered.

Change-Id: I2de8018dc21763eb5a19bb9d48dfbdef764b036e
Signed-off-by: lorneli <lorneli@163.com>
Reviewed-on: https://review.gerrithub.io/c/444702
Reviewed-by: Ziye Yang <ziye.yang@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
Reviewed-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com>
Reviewed-by: Seth Howell <seth.howell5141@gmail.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
2019-02-21 20:29:59 +00:00
heyang
7cd3a6f5e0 nvme: add memory barrier in completion path for arm64
Add a memory barrier for arm64 to prevent possible reordering
of tracker and cpl access,
because arm64 has less strict memory ordering behavior than x86.

Change-Id: I0a8716f7bfeffb0bbce27ee3174e214c8e4566b4
Signed-off-by: heyang <heyang18@huawei.com>
Reviewed-on: https://review.gerrithub.io/c/442964
Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
Reviewed-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
2019-02-21 18:02:31 +00:00
Changpeng Liu
3306e49e24 nvme: introduce probe context data structure and API
Existing NVMe driver uses a global list g_nvme_init_ctrlrs
to track the controllers during initialization, and internal
function will start each controller in the list one by one
until the list is empty.  We introduce a probe context
and move the global list into the context, with the context
we can enable asynchronous probe API in the next patch, also
this can enable parallel probe feature.

Change-Id: I538537abe8c1a4a82fb168ca8055de42caa6e4f9
Signed-off-by: Changpeng Liu <changpeng.liu@intel.com>
Reviewed-on: https://review.gerrithub.io/c/426304
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
2019-02-15 03:14:20 +00:00
lorneli
4b6621d08e nvme/pcie: mark infrequent cases as unlikely in submission path
Currently infrequent cases in request completion path are marked as
unlikely. This patch applies that to submission path.

These cases are infrequent and marked using unlikely marco:
a. The sq tail reaches the end of queue.
b. The sq tail equals to sq head. (never happen if FW runs correctly)
c. The qpair is admin queue.

Change-Id: I8b873a18615788f2efbf7c683aad710c7007a082
Signed-off-by: lorneli <lorneli@163.com>
Reviewed-on: https://review.gerrithub.io/c/443451
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
2019-02-06 18:37:40 +00:00
Darek Stojaczyk
eecc6dc8e6 memory: replace all hardcoded 0x200000 with a define
Makes the code slightly more readable.

Change-Id: Iebf8fb07bceacf433d4bdad0a30419a3faab7eee
Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com>
Reviewed-on: https://review.gerrithub.io/c/439370
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Chandler-Test-Pool: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
2019-01-13 00:47:26 +00:00
Darek Stojaczyk
3edc4db7a7 env: move VALUE_2MB defines into a new internal header
We use those values in various places in SPDK,
so let's define them in a single place now.

Change-Id: Iad9a5745d69166a6e6032370d4e5a0e604914e45
Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com>
Reviewed-on: https://review.gerrithub.io/c/439369
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Chandler-Test-Pool: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
2019-01-13 00:47:26 +00:00
Darek Stojaczyk
8c4ed83b49 vtophys: add length parameter to the vtophys function
This follows the same trend as the mem_map APIs.

Currently, most of the spdk_vtophys() callers manually
detect physically noncontiguous buffers to split them
into multiple physically contiguous chunks. This patch
is a first step towards encapsulating most of that logic
in a single place - in spdk_vtophys() itself.

This patch doesn't change any functionality on its own,
it only extends the API.

Change-Id: I16faa9dea270c370f2a814cd399f59055b5ccc3d
Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com>
Reviewed-on: https://review.gerrithub.io/c/438449
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Chandler-Test-Pool: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-by: wuzhouhui <wuzhouhui@kingsoft.com>
Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
2019-01-09 08:24:59 +00:00
Darek Stojaczyk
576f08f732 pci: remove nvme-specific attach functions
As a part of cleanup they're replaced by a device-agnostic
attach API, which is easier for us to manage.

Change-Id: I7558590e41e5c580a130a6aba7ae4f7dcff58da8
Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com>
Reviewed-on: https://review.gerrithub.io/436478
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Chandler-Test-Pool: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
2018-12-07 17:24:19 +00:00
Darek Stojaczyk
5557c59c15 nvme/pcie: don't allow constructing a controller from secondary process
With various possibilities to leak the rte_pci_device in the
primary process, we could technically construct the controller
in secondary. The nvme stack is not prepared for this and
will fail to initialize the device, but will still leak the
device object memory.

This patch adds an extra check to prevent any controller from
being constructed in secondary process.

Change-Id: I772f42b541c5db53310362b6595cebf9a30e8491
Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com>
Reviewed-on: https://review.gerrithub.io/434407
Chandler-Test-Pool: SPDK Automated Test System <sys_sgsw@intel.com>
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
2018-11-30 16:25:16 +00:00
Darek Stojaczyk
8ee5ca50e7 nvme_pcie: re-probe the pci bus on hotplug event
Explicitly attaching a PCI device with spdk_pci_device_attach()
bypasses any kind of blacklists and should be only used
on a user request. Hotplug uevent is certainly not a user
request and should respect the blacklist, hence it's now
changed to call spdk_pci_enumerate() to probe new devices.
The enumeration callback will reject devices other that the
one we got hotplug request for, so no behavior is changed
in that matter.

This patch also fixes undefined behavior caused by reading
unitialized struct nvme_pcie_enum_cb;

Change-Id: I1399fbdd426152a13ed75c85a52bc7f0491ce287
Signed-off-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com>
Reviewed-on: https://review.gerrithub.io/433867
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
2018-11-20 15:05:01 +00:00
zkhatami88
eb6a2cb8f5 nvme:replacing spdk_dma_malloc with spdk_z/malloc
Change-Id: I755d36495e7d8e55c26c4103a9520102223798ef
Signed-off-by: zkhatami88 <z.khatami88@gmail.com>
Reviewed-on: https://review.gerrithub.io/409960
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
Chandler-Test-Pool: SPDK Automated Test System <sys_sgsw@intel.com>
2018-08-31 17:42:29 +00:00
Dariusz Stojaczyk
564db67415 nvme/pcie: make sure sq and cq are physically contiguous
The spdk_dma_zmalloc guarantee about physical memory contiguity
is about to be removed soon. For hardware rings that require
physical memory or IOVA contiguity we will now enforce hugepage
alignment and size restrictions to make sure they occupy only
a single hugepage.

Change-Id: Iebaf1e7b701d676be1f04a9189201c5d89dad395
Signed-off-by: Dariusz Stojaczyk <dariuszx.stojaczyk@intel.com>
Reviewed-on: https://review.gerrithub.io/418547
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
Chandler-Test-Pool: SPDK Automated Test System <sys_sgsw@intel.com>
2018-07-12 20:13:43 +00:00
Daniel Verkamp
4a9dce9a48 Use SPDK_CONTAINEROF in a few more places
A few open-coded sequences equivalent to SPDK_CONTAINEROF() were
scattered around; replace them with the macro from spdk/util.h.

Change-Id: I95c6e6838902f411420573399ced7c58c2e4ef84
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-on: https://review.gerrithub.io/418126
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
2018-07-06 22:47:04 +00:00
Dariusz Stojaczyk
d36ce206ec nvme/pcie: do not assume tracker array memory is physically contiguous
The spdk_dma_zmalloc guarantee about physical memory contiguity
is about to be removed soon. A single tracker is page size
aligned and is exactly one page big, so it is physically
contiguous, but we can't assume an array of those is physically
contiguous as well.

Change-Id: I3aa4d14dd677601c30aa2d8f15197886d6c46e58
Signed-off-by: Dariusz Stojaczyk <dariuszx.stojaczyk@intel.com>
Reviewed-on: https://review.gerrithub.io/416840
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
2018-07-06 18:37:09 +00:00
Dariusz Stojaczyk
5f14637246 nvme/pcie: merge physically contiguous SGEs
There's no need to split a bufffer if it's physically
contiguous. We can now merge buffers that would be
previously split by the nvme_pcie driver and also
separate SGEs provided by the user that happen to be
physically contiguous.

Change-Id: I9c9de31d52a9dc9e384806555cb94609aff0ccf3
Signed-off-by: Dariusz Stojaczyk <dariuszx.stojaczyk@intel.com>
Reviewed-on: https://review.gerrithub.io/417061
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
2018-07-02 19:13:23 +00:00
Dariusz Stojaczyk
3320c06b4c nvme/pcie: split HW SGL entries on 2MB address boundary
This allows NVMe PCIe devices to be used with
physically discontiguous I/O payload buffers.

So far this is just a dumb splitting which
doesn't check for physical contiguity. This is
improved in a subsequent patch.

Change-Id: I0ecc443149225eaa0e4156ddda78613bcf034406
Suggested-by: Daniel Verkamp <daniel.verkamp@intel.com>
Signed-off-by: Dariusz Stojaczyk <dariuszx.stojaczyk@intel.com>
Reviewed-on: https://review.gerrithub.io/417060
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
2018-07-02 19:13:23 +00:00
Liang Yan
8c71c208a2 nvme: check ctrlr process while get ctrlr data in hotplug function.
Fix issue #313.
For multi-process test scenarios, the secondary process may access
controller’s CSTS register in the shared ctrlr list. For this situation,
all the controllers are already in the primary shared ctrlr list, but
then each controller is added one by one in the secondary process, so the
secondary process may access CSTS before it is remapped for the BAR space.

In the rpc_config.sh test case, the spdk_nvme_ctrlr_get_regs_csts function
will be called in _nvme_pcie_hotplug_monitor function before calling
spdk_pci_nvme_device_attach. This step caused the secondary process iSCSI
Target access CSTS before it is remapped for the BAR space.

Change-Id: Ifd62c38adf8624f9877a9a2f965ca4db28839d99
Signed-off-by: Liang Yan <liang.z.yan@intel.com>
Reviewed-on: https://review.gerrithub.io/412594
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
Reviewed-by: GangCao <gang.cao@intel.com>
Reviewed-by: Ziye Yang <optimistyzy@gmail.com>
Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
2018-06-25 22:05:52 +00:00
Changpeng Liu
967339f3e5 nvme: factor out qpair destruction function
Factor qpair destruction function so that we can put common
resource release together in future.

Change-Id: I44139947820c2a384b745ae2673799f1b736369c
Signed-off-by: Changpeng Liu <changpeng.liu@intel.com>
Reviewed-on: https://review.gerrithub.io/412604
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
2018-06-08 00:26:05 +00:00
Daniel Verkamp
8b158aaacd nvme: factor out request timeout checking
This will be used in other transports as well.

Change-Id: I05026b0dfea2647d61a173379aca368ca48a2f52
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-on: https://review.gerrithub.io/413864
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
2018-06-07 15:46:50 +00:00
Daniel Verkamp
cdb3a594a8 nvme: ignore requests submitted before timeout set
If requests are in flight at the time a timeout callback is configured,
we can't retroactively get the submission time of those requests; treat
them as not having a timeout.

Change-Id: Ic589e874a0f2c8c7f4ce352afa7c3aea33b01fae
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-on: https://review.gerrithub.io/413863
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
2018-06-07 15:46:50 +00:00
Daniel Verkamp
e7b29a14c0 nvme: move timeout information to nvme_request
This is the first step toward timeout handling for other transports.

Change-Id: I386dd990f667d449e94ba4bcedaa3435743755fd
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-on: https://review.gerrithub.io/413862
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
2018-06-07 15:46:50 +00:00
Daniel Verkamp
1681a055f9 nvme/pcie: restore timeout checking on admin queue
This was partially fixed in commit ddeaeeec19 ("nvme: Only check
timeouts on requests from the same process"), but the function that
calls nvme_pcie_qpair_check_timeout() was also erroneously filtering out
the admin queue.  Restore the original behavior of checking all queue
types.

Change-Id: I26a44ff5eb772735d314ce7b8322ba9222675911
Fixes: 31bf5d795e ("nvme: make timeout function per process")
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-on: https://review.gerrithub.io/411628
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
2018-06-07 15:46:50 +00:00
Daniel Verkamp
008c111b48 nvme/pcie: only set mmio_ctrlr around actual MMIO
When the shadow doorbell feature is enabled, no actual MMIO takes place
when a shadow update is sufficient; tighten the bounds of the updates to
g_thread_mmio_ctrlr in the two doorbell update locations so that we only
need to touch the thread-local variable when actual MMIO access is
required.

Change-Id: Ida974bec33f56cbb9f7d3611f483c6975ec773ab
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-on: https://review.gerrithub.io/413856
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
2018-06-06 17:10:09 +00:00
Daniel Verkamp
7dff719f7e nvme: optimize layout of struct nvme_payload
Rather than storing nvme_payload::type explicitly, use the SGL reset
function pointer as an indicator: if reset_sgl_fn is non-NULL, then the
payload is an SGL type; otherwise it is a contiguous buffer type.

This eliminates the one-byte type member from struct nvme_payload,
making it an even 32 bytes instead of 33, allowing the removal of the
awkward packing inside struct nvme_request.

Change-Id: If2a32437a23fe14eb5287e096ac060067296f1dd
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-on: https://review.gerrithub.io/413175
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
2018-06-01 21:01:42 +00:00
Daniel Verkamp
5c2ccd0628 nvme: add helper function to get payload type
This will simplify upcoming patches that change the way nvme_payload
stores its type.

Change-Id: Idf0a5b8dfd7d66a10f89254d2c5c54fee2968a43
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-on: https://review.gerrithub.io/413173
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
2018-06-01 21:01:42 +00:00
Changpeng Liu
266f37a5a0 nvme: make response callback after moving completion queue head
For some cases, especially for Admin commands, there maybe has
recursive commands, e.g.: in AER callback we may send a new AER
request, in such case, the current code can't process such
case.  While here, move the completion queue head to next before
any response callback will fix such issue.

Change-Id: Ide56701d94615881790cf025ede2f07420b9b16e
Signed-off-by: Changpeng Liu <changpeng.liu@intel.com>
Reviewed-on: https://review.gerrithub.io/412766
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
2018-05-29 18:09:30 +00:00
Daniel Verkamp
c4bb0ea600 nvme: add helper to wait for internal commands
Factor out the common pattern of waiting for an internally-submitted
command to complete.  This will give us a convenient central place to
add error checking.

Change-Id: I65334d654d294cfb208fc86d16fa387ac5432254
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-on: https://review.gerrithub.io/412545
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
2018-05-28 01:43:55 +00:00
Changpeng Liu
65e56caa17 nvme: wrapper request completion callback into a function
When IO is finished SPDK will trigger callback at controller layer,
while here, wrapper the completion callback into a function so
that we can add error injection at this function in following patch.

Change-Id: I7b7a6d278d87fd09a05f51f688398fdf2e9c4e05
Signed-off-by: Changpeng Liu <changpeng.liu@intel.com>
Reviewed-on: https://review.gerrithub.io/411630
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
2018-05-24 18:03:25 +00:00
Daniel Verkamp
cbd9c241dc nvme: factor out process lookup into a function
Change-Id: I7598222db5d76c1a1578fbb5935d4348f7c62f54
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-on: https://review.gerrithub.io/410951
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
2018-05-21 18:22:50 +00:00
Daniel Verkamp
f7b58aea2b nvme: capture VS register at init time
This will be used later instead of retrieving VS (potentially via a Get
property command for Fabrics) multiple times.

The Active NS List code was previously depending on the VER field of the
Identify Controller data, but this was only added with NVMe 1.2, so we
can't rely on it to detect NVMe 1.1 controllers; it is changed to use
the new cache VS value instead.

Change-Id: Iba9ed5ecbc82b4654973438d119daba0c4cf0724
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-on: https://review.gerrithub.io/408895
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
2018-04-30 17:19:07 +00:00
Ben Walker
ddeaeeec19 nvme: Only check timeouts on requests from the same process
Change-Id: I80521c4c01daf033319f88cf273255387a7b5248
Signed-off-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-on: https://review.gerrithub.io/408403
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
2018-04-20 16:23:36 -04:00
Daniel Verkamp
8e098e4190 nvme: verify remove_cb is non-NULL before calling
This fixes the VFIO hot-remove path, which called remove_cb without
checking to see if it had been specified by the user.  The normal uevent
removal path already checked for remove_cb.

Change-Id: I0ad8d2c90a77b16800a8b505cb69ea05b0706d70
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-on: https://review.gerrithub.io/408392
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
2018-04-19 18:47:51 -04:00
Ben Walker
37ef0cca91 nvme: Don't expose admin qpair in timeout callbacks
This was broken by commit 31bf5d795

Change-Id: I8c81c7b76cd47db347ce9c3f8a0e8296b690cb49
Signed-off-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-on: https://review.gerrithub.io/408240
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
2018-04-19 15:48:36 -04:00
Ben Walker
63fb2f772c nvme: Close file descriptor if controller fails to initialize
Change-Id: I9fee91ece79b204962a70fc49d9032abe2c55090
Signed-off-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-on: https://review.gerrithub.io/408218
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
2018-04-18 15:35:12 -04:00
Ziye Yang
31bf5d795e nvme: make timeout function per process
Change-Id: I6e58baaeb09580b5f70e1acf5323376ca0b26bbf
Signed-off-by: Ziye Yang <optimistyzy@gmail.com>
Reviewed-on: https://review.gerrithub.io/407382
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
2018-04-13 12:30:51 -04:00
Daniel Verkamp
8a6ba58cb4 scripts/check_format: check for spaces before tabs
Automatically detect more whitespace errors.

All existing cases are fixed; only whitespace change (verify with
diff -w) except for one comment style fixup in include/spdk/nvme.h.

Change-Id: If750e54b9c8e3421ea6feda5f20184a31431631e
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-on: https://review.gerrithub.io/402360
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
2018-03-05 11:09:13 -05:00
Stephen Bates
627bee96a4 nvme_pci: Correct bug in CMB allocation
There was a bug reported by Cunyin Chang with regards to how the
cmb_current_offset was calculated when the CMB offset into the CMB BAR
is non-zero. This patch fixes this issue and also fixes the problem
that the last valid offset into the BAR *may* differ if registration
is utilized or not (due to the 2MiB alignment and length requirements
for registered memory).

Change-Id: Id08d6a5a40b828338f6a66599171cc8dd59768a3
Signed-off-by: Stephen Bates <sbates@raithlin.com>
Reviewed-on: https://review.gerrithub.io/401832
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
2018-03-02 13:31:48 -05:00
Ehud Naim
c83cd9375b nvme: fixing ctrlr mutex free
adding nvme_ctrlr_destruct_finish because nvme_transport_ctrlr_destruct may
use a destroyed mutex.

nvme_ctrlr_destruct() free "ctrlr_lock" and after that call
nvme_transport_ctrlr_destruct()->nvme_pcie_ctrlr_destruct()(with pci)->
nvme_ctrlr_proc_get_devhandle()->nvme_robust_mutex_lock(&ctrlr->ctrlr_lock);

Change-Id: I55714ea9097d2c9d844a00b5a88fa2d51a3f4469
Signed-off-by: Ehud Naim <ehudn@marvell.com>
Reviewed-on: https://review.gerrithub.io/399605
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
2018-02-20 12:31:34 -05:00
Daniel Verkamp
3839639759 nvme: add API to allocate CMB I/O buffers
Change-Id: I2a3c7a272dc08be5a5ecb4339622816482c4cbb0
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
Signed-off-by: Stephen Bates <sbates@raithlin.com>
Reviewed-on: https://review.gerrithub.io/397036
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
2018-02-12 19:11:44 -05:00
Daniel Verkamp
f185e4ecf8 nvme/pcie: register CMB with spdk_mem_register()
Enable address translation for I/O buffers within the controller memory
buffer region by registering the CMB using spdk_mem_register().

Change-Id: I44829757ad15fbc3ea96fa494b9fb32dd67a7138
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
Signed-off-by: Stephen Bates <sbates@raithlin.com>
Reviewed-on: https://review.gerrithub.io/397035
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
2018-02-12 19:11:44 -05:00
Daniel Verkamp
5e86c80951 nvme/pcie: limit max completions based on queue size
For a given hardware queue size, only allow a quarter of the queue size
to be returned as completions in a single call to
spdk_nvme_qpair_process_completions(), and adjust num_trackers to match
so that num_trackers + max_completions_cap doesn't exceed the hardware
completion queue size.  This ensures that there is room in the
completion queue if new I/O is issued in response to completions before
we ring the completion queue doorbell.

The choice of 1/4 queue size is arbitrary; this seems to be a good
compromise between completion batch size and number of trackers.

Change-Id: I2c5aad7b98bfc8b33e53242240b2c9254fa05b4e
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-on: https://review.gerrithub.io/393529
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
2018-01-05 12:45:28 -05:00
Changpeng Liu
381af5775f nvme: re-enable the separate metadata support in nvme driver
Commit ID "269910c0" removed the support of separate metadata,
for those controllers which can support this feature, SPDK driver
can't be used. SPDK provides APIs such as:
spdk_nvme_ctrlr_cmd_io_raw_with_md/spdk_nvme_ns_cmd_write_with_md/
spdk_nvme_ns_cmd_read_with_md, which can support separate metadata.
While here, re-enable this feature with this commit.

Change-Id: If77c21e9ac700c4b334548ebfa7e8e6286285a64
Signed-off-by: Changpeng Liu <changpeng.liu@intel.com>
Reviewed-on: https://review.gerrithub.io/392440
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
2017-12-21 13:21:55 -05:00
Jim Harris
9c1d97a247 nvme: add checks for sq_head
Signed-off-by: Jim Harris <james.r.harris@intel.com>
Change-Id: I8519a4b68db44cb8fe6dd251a52bf0f1dca73c32

Reviewed-on: https://review.gerrithub.io/391890
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
2017-12-19 16:45:05 -05:00
Cunyin Chang
6e82aa5ace nvme: Add support of hot remove vfio-attached devices in pcie layer.
Change-Id: Ia7d6ca2d6c0bec6345f05718f6a6328eccda2dcc
Signed-off-by: Cunyin Chang <cunyin.chang@intel.com>
Reviewed-on: https://review.gerrithub.io/391329
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
2017-12-19 13:07:20 -05:00
Daniel Verkamp
59970a89be astyle: enforce braces around single-line statements
Require braces around all conditional statements, e.g.:

    if (cond)
        statement();

becomes:

    if (cond) {
        statement();
    }

This is the style used through most of the SPDK code, but several
exceptions crept in over time.  Add the astyle option to make sure we
are consistent.

Change-Id: I5a71980147fe8dfb471ff42e8bc06db2124a1a7f
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
Reviewed-on: https://review.gerrithub.io/390914
Reviewed-by: <shuhei.matsumoto.xt@hitachi.com>
Reviewed-by: Dariusz Stojaczyk <dariuszx.stojaczyk@intel.com>
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
2017-12-11 11:19:32 -05:00