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barrier: RISC-V memory barriers

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Introduce memory barriers for RISC-V.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Change-Id: I6761c2b6ddc28a856cac1e1a67e0b0fa0e0ab3a0
Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/12878
Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com>
Community-CI: Mellanox Build Bot
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Aleksey Marchuk <alexeymar@nvidia.com>
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
This commit is contained in:
Heinrich Schuchardt 2022-06-02 13:46:28 +02:00 committed by Tomasz Zawadzki
parent 8d515e0243
commit c1e0b73e85
1 changed files with 10 additions and 0 deletions
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10
include/spdk/barrier.h
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@ -103,6 +103,16 @@ extern "C" {
#endif #endif
#define _spdk_ivdt_dcache(pdata) #define _spdk_ivdt_dcache(pdata)
#elif defined(__riscv)
#define _spdk_rmb() __asm__ __volatile__("fence ir, ir" ::: "memory")
#define _spdk_wmb() __asm__ __volatile__("fence ow, ow" ::: "memory")
#define _spdk_mb() __asm__ __volatile__("fence iorw, iorw" ::: "memory")
#define _spdk_smp_rmb() __asm__ __volatile__("fence r, r" ::: "memory")
#define _spdk_smp_wmb() __asm__ __volatile__("fence w, w" ::: "memory")
#define _spdk_smp_mb() __asm__ __volatile__("fence rw, rw" ::: "memory")
#define _spdk_ivdt_dcache(pdata)
#else #else
#define _spdk_rmb() #define _spdk_rmb()