accel: cleanup by getting rid of capabilties enum
In support of upcoming patches and to greatly simplify things, the capabilites enum which held bit positions for each opcode has been removed. Only the opcodes enum remains and thus only opcodes are used throughout. For the capabiltiies bitmap a helper function is added to convert from opcode to bit position. Right now it is used in the IO path but in upcoming patches that goes away and the conversion is only done at init time. Signed-off-by: paul luse <paul.e.luse@intel.com> Change-Id: Ic4ad15b9f24ad3675a7bba4831f4e81de9b7bc70 Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/11949 Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com> Community-CI: Mellanox Build Bot Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Tomasz Zawadzki <tomasz.zawadzki@intel.com>
This commit is contained in:
parent
0d29a988be
commit
37b68d7287
@ -61,7 +61,7 @@ static int g_fail_percent_goal = 0;
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static uint8_t g_fill_pattern = 255;
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static bool g_verify = false;
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static const char *g_workload_type = NULL;
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static enum accel_capability g_workload_selection;
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static enum accel_opcode g_workload_selection;
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static struct worker_thread *g_workers = NULL;
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static int g_num_workers = 0;
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static pthread_mutex_t g_workers_lock = PTHREAD_MUTEX_INITIALIZER;
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@ -110,15 +110,15 @@ dump_user_config(struct spdk_app_opts *opts)
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printf("Core mask: %s\n\n", opts->reactor_mask);
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printf("Accel Perf Configuration:\n");
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printf("Workload Type: %s\n", g_workload_type);
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if (g_workload_selection == ACCEL_CRC32C || g_workload_selection == ACCEL_COPY_CRC32C) {
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if (g_workload_selection == ACCEL_OPC_CRC32C || g_workload_selection == ACCEL_OPC_COPY_CRC32C) {
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printf("CRC-32C seed: %u\n", g_crc32c_seed);
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printf("vector count %u\n", g_crc32c_chained_count);
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} else if (g_workload_selection == ACCEL_FILL) {
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} else if (g_workload_selection == ACCEL_OPC_FILL) {
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printf("Fill pattern: 0x%x\n", g_fill_pattern);
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} else if ((g_workload_selection == ACCEL_COMPARE) && g_fail_percent_goal > 0) {
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} else if ((g_workload_selection == ACCEL_OPC_COMPARE) && g_fail_percent_goal > 0) {
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printf("Failure inject: %u percent\n", g_fail_percent_goal);
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}
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if (g_workload_selection == ACCEL_COPY_CRC32C) {
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if (g_workload_selection == ACCEL_OPC_COPY_CRC32C) {
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printf("Vector size: %u bytes\n", g_xfer_size_bytes);
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printf("Transfer size: %u bytes\n", g_xfer_size_bytes * g_crc32c_chained_count);
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} else {
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@ -211,17 +211,17 @@ parse_args(int argc, char *argv)
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case 'w':
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g_workload_type = optarg;
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if (!strcmp(g_workload_type, "copy")) {
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g_workload_selection = ACCEL_COPY;
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g_workload_selection = ACCEL_OPC_COPY;
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} else if (!strcmp(g_workload_type, "fill")) {
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g_workload_selection = ACCEL_FILL;
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g_workload_selection = ACCEL_OPC_FILL;
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} else if (!strcmp(g_workload_type, "crc32c")) {
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g_workload_selection = ACCEL_CRC32C;
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g_workload_selection = ACCEL_OPC_CRC32C;
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} else if (!strcmp(g_workload_type, "copy_crc32c")) {
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g_workload_selection = ACCEL_COPY_CRC32C;
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g_workload_selection = ACCEL_OPC_COPY_CRC32C;
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} else if (!strcmp(g_workload_type, "compare")) {
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g_workload_selection = ACCEL_COMPARE;
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g_workload_selection = ACCEL_OPC_COMPARE;
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} else if (!strcmp(g_workload_type, "dualcast")) {
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g_workload_selection = ACCEL_DUALCAST;
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g_workload_selection = ACCEL_OPC_DUALCAST;
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}
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break;
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default:
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@ -260,11 +260,11 @@ _get_task_data_bufs(struct ap_task *task)
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/* For dualcast, the DSA HW requires 4K alignment on destination addresses but
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* we do this for all engines to keep it simple.
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*/
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if (g_workload_selection == ACCEL_DUALCAST) {
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if (g_workload_selection == ACCEL_OPC_DUALCAST) {
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align = ALIGN_4K;
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}
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if (g_workload_selection == ACCEL_CRC32C || g_workload_selection == ACCEL_COPY_CRC32C) {
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if (g_workload_selection == ACCEL_OPC_CRC32C || g_workload_selection == ACCEL_OPC_COPY_CRC32C) {
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assert(g_crc32c_chained_count > 0);
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task->iov_cnt = g_crc32c_chained_count;
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task->iovs = calloc(task->iov_cnt, sizeof(struct iovec));
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@ -273,7 +273,7 @@ _get_task_data_bufs(struct ap_task *task)
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return -ENOMEM;
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}
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if (g_workload_selection == ACCEL_COPY_CRC32C) {
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if (g_workload_selection == ACCEL_OPC_COPY_CRC32C) {
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dst_buff_len = g_xfer_size_bytes * g_crc32c_chained_count;
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}
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@ -294,14 +294,14 @@ _get_task_data_bufs(struct ap_task *task)
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}
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/* For fill, set the entire src buffer so we can check if verify is enabled. */
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if (g_workload_selection == ACCEL_FILL) {
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if (g_workload_selection == ACCEL_OPC_FILL) {
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memset(task->src, g_fill_pattern, g_xfer_size_bytes);
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} else {
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memset(task->src, DATA_PATTERN, g_xfer_size_bytes);
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}
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}
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if (g_workload_selection != ACCEL_CRC32C) {
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if (g_workload_selection != ACCEL_OPC_CRC32C) {
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task->dst = spdk_dma_zmalloc(dst_buff_len, align, NULL);
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if (task->dst == NULL) {
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fprintf(stderr, "Unable to alloc dst buffer\n");
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@ -309,14 +309,14 @@ _get_task_data_bufs(struct ap_task *task)
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}
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/* For compare we want the buffers to match, otherwise not. */
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if (g_workload_selection == ACCEL_COMPARE) {
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if (g_workload_selection == ACCEL_OPC_COMPARE) {
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memset(task->dst, DATA_PATTERN, dst_buff_len);
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} else {
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memset(task->dst, ~DATA_PATTERN, dst_buff_len);
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}
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}
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if (g_workload_selection == ACCEL_DUALCAST) {
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if (g_workload_selection == ACCEL_OPC_DUALCAST) {
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task->dst2 = spdk_dma_zmalloc(g_xfer_size_bytes, align, NULL);
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if (task->dst2 == NULL) {
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fprintf(stderr, "Unable to alloc dst buffer\n");
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@ -355,25 +355,25 @@ _submit_single(struct worker_thread *worker, struct ap_task *task)
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assert(worker);
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switch (g_workload_selection) {
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case ACCEL_COPY:
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case ACCEL_OPC_COPY:
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rc = spdk_accel_submit_copy(worker->ch, task->dst, task->src,
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g_xfer_size_bytes, flags, accel_done, task);
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break;
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case ACCEL_FILL:
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case ACCEL_OPC_FILL:
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/* For fill use the first byte of the task->dst buffer */
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rc = spdk_accel_submit_fill(worker->ch, task->dst, *(uint8_t *)task->src,
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g_xfer_size_bytes, flags, accel_done, task);
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break;
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case ACCEL_CRC32C:
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case ACCEL_OPC_CRC32C:
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rc = spdk_accel_submit_crc32cv(worker->ch, &task->crc_dst,
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task->iovs, task->iov_cnt, g_crc32c_seed,
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accel_done, task);
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break;
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case ACCEL_COPY_CRC32C:
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case ACCEL_OPC_COPY_CRC32C:
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rc = spdk_accel_submit_copy_crc32cv(worker->ch, task->dst, task->iovs, task->iov_cnt,
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&task->crc_dst, g_crc32c_seed, flags, accel_done, task);
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break;
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case ACCEL_COMPARE:
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case ACCEL_OPC_COMPARE:
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random_num = rand() % 100;
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if (random_num < g_fail_percent_goal) {
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task->expected_status = -EILSEQ;
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@ -385,7 +385,7 @@ _submit_single(struct worker_thread *worker, struct ap_task *task)
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rc = spdk_accel_submit_compare(worker->ch, task->dst, task->src,
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g_xfer_size_bytes, accel_done, task);
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break;
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case ACCEL_DUALCAST:
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case ACCEL_OPC_DUALCAST:
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rc = spdk_accel_submit_dualcast(worker->ch, task->dst, task->dst2,
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task->src, g_xfer_size_bytes, flags, accel_done, task);
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break;
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@ -405,7 +405,7 @@ _free_task_buffers(struct ap_task *task)
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{
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uint32_t i;
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if (g_workload_selection == ACCEL_CRC32C || g_workload_selection == ACCEL_COPY_CRC32C) {
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if (g_workload_selection == ACCEL_OPC_CRC32C || g_workload_selection == ACCEL_OPC_COPY_CRC32C) {
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if (task->iovs) {
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for (i = 0; i < task->iov_cnt; i++) {
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if (task->iovs[i].iov_base) {
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@ -419,7 +419,7 @@ _free_task_buffers(struct ap_task *task)
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}
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spdk_dma_free(task->dst);
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if (g_workload_selection == ACCEL_DUALCAST) {
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if (g_workload_selection == ACCEL_OPC_DUALCAST) {
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spdk_dma_free(task->dst2);
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}
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}
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@ -458,7 +458,7 @@ accel_done(void *arg1, int status)
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if (g_verify && status == 0) {
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switch (g_workload_selection) {
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case ACCEL_COPY_CRC32C:
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case ACCEL_OPC_COPY_CRC32C:
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sw_crc32c = spdk_crc32c_iov_update(task->iovs, task->iov_cnt, ~g_crc32c_seed);
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if (task->crc_dst != sw_crc32c) {
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SPDK_NOTICELOG("CRC-32C miscompare\n");
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@ -469,20 +469,20 @@ accel_done(void *arg1, int status)
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worker->xfer_failed++;
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}
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break;
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case ACCEL_CRC32C:
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case ACCEL_OPC_CRC32C:
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sw_crc32c = spdk_crc32c_iov_update(task->iovs, task->iov_cnt, ~g_crc32c_seed);
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if (task->crc_dst != sw_crc32c) {
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SPDK_NOTICELOG("CRC-32C miscompare\n");
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worker->xfer_failed++;
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}
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break;
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case ACCEL_COPY:
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case ACCEL_OPC_COPY:
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if (memcmp(task->src, task->dst, g_xfer_size_bytes)) {
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SPDK_NOTICELOG("Data miscompare\n");
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worker->xfer_failed++;
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}
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break;
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case ACCEL_DUALCAST:
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case ACCEL_OPC_DUALCAST:
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if (memcmp(task->src, task->dst, g_xfer_size_bytes)) {
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SPDK_NOTICELOG("Data miscompare, first destination\n");
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worker->xfer_failed++;
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@ -492,13 +492,13 @@ accel_done(void *arg1, int status)
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worker->xfer_failed++;
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}
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break;
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case ACCEL_FILL:
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case ACCEL_OPC_FILL:
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if (memcmp(task->dst, task->src, g_xfer_size_bytes)) {
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SPDK_NOTICELOG("Data miscompare\n");
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worker->xfer_failed++;
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}
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break;
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case ACCEL_COMPARE:
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case ACCEL_OPC_COMPARE:
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break;
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default:
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assert(false);
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@ -732,12 +732,12 @@ main(int argc, char **argv)
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goto cleanup;
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}
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if ((g_workload_selection != ACCEL_COPY) &&
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(g_workload_selection != ACCEL_FILL) &&
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(g_workload_selection != ACCEL_CRC32C) &&
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(g_workload_selection != ACCEL_COPY_CRC32C) &&
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(g_workload_selection != ACCEL_COMPARE) &&
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(g_workload_selection != ACCEL_DUALCAST)) {
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if ((g_workload_selection != ACCEL_OPC_COPY) &&
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(g_workload_selection != ACCEL_OPC_FILL) &&
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(g_workload_selection != ACCEL_OPC_CRC32C) &&
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(g_workload_selection != ACCEL_OPC_COPY_CRC32C) &&
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(g_workload_selection != ACCEL_OPC_COMPARE) &&
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(g_workload_selection != ACCEL_OPC_DUALCAST)) {
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usage();
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g_rc = -1;
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goto cleanup;
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@ -754,7 +754,7 @@ main(int argc, char **argv)
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g_allocate_depth = g_queue_depth;
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}
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if ((g_workload_selection == ACCEL_CRC32C || g_workload_selection == ACCEL_COPY_CRC32C) &&
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if ((g_workload_selection == ACCEL_OPC_CRC32C || g_workload_selection == ACCEL_OPC_COPY_CRC32C) &&
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g_crc32c_chained_count == 0) {
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usage();
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g_rc = -1;
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@ -47,14 +47,14 @@ extern "C" {
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/* Flags for accel operations */
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#define ACCEL_FLAG_PERSISTENT (1 << 0)
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enum accel_capability {
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ACCEL_COPY = 1 << 0,
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ACCEL_FILL = 1 << 1,
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ACCEL_DUALCAST = 1 << 2,
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ACCEL_COMPARE = 1 << 3,
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ACCEL_CRC32C = 1 << 4,
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ACCEL_DIF = 1 << 5,
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ACCEL_COPY_CRC32C = 1 << 6,
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enum accel_opcode {
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ACCEL_OPC_COPY = 0,
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ACCEL_OPC_FILL = 1,
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ACCEL_OPC_DUALCAST = 2,
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ACCEL_OPC_COMPARE = 3,
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ACCEL_OPC_CRC32C = 4,
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ACCEL_OPC_COPY_CRC32C = 5,
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ACCEL_OPC_LAST = 6,
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};
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/**
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@ -56,16 +56,6 @@ struct sw_accel_io_channel {
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TAILQ_HEAD(, spdk_accel_task) tasks_to_complete;
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};
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enum accel_opcode {
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ACCEL_OPCODE_MEMMOVE = 0,
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ACCEL_OPCODE_MEMFILL = 1,
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ACCEL_OPCODE_COMPARE = 2,
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ACCEL_OPCODE_BATCH = 3,
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ACCEL_OPCODE_CRC32C = 4,
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ACCEL_OPCODE_DUALCAST = 5,
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ACCEL_OPCODE_COPY_CRC32C = 6,
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};
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struct spdk_accel_task {
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struct accel_io_channel *accel_ch;
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spdk_accel_completion_cb cb_fn;
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@ -95,8 +85,7 @@ struct spdk_accel_task {
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};
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struct spdk_accel_engine {
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uint64_t capabilities;
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uint64_t (*get_capabilities)(void);
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bool (*supports_opcode)(enum accel_opcode);
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struct spdk_io_channel *(*get_io_channel)(void);
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int (*submit_tasks)(struct spdk_io_channel *ch, struct spdk_accel_task *accel_task);
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};
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@ -107,9 +107,9 @@ accel_sw_unregister(void)
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* via SW implementation.
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*/
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inline static bool
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_is_supported(struct spdk_accel_engine *engine, enum accel_capability operation)
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_is_supported(struct spdk_accel_engine *engine, enum accel_opcode operation)
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{
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return ((engine->capabilities & operation) == operation);
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return (engine->supports_opcode(operation));
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}
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void
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@ -190,11 +190,11 @@ spdk_accel_submit_copy(struct spdk_io_channel *ch, void *dst, void *src, uint64_
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accel_task->dst = dst;
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accel_task->src = src;
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accel_task->op_code = ACCEL_OPCODE_MEMMOVE;
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accel_task->op_code = ACCEL_OPC_COPY;
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accel_task->nbytes = nbytes;
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accel_task->flags = flags;
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if (_is_supported(accel_ch->engine, ACCEL_COPY)) {
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if (_is_supported(accel_ch->engine, ACCEL_OPC_COPY)) {
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return accel_ch->engine->submit_tasks(accel_ch->engine_ch, accel_task);
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} else {
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rc = _check_flags(flags);
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@ -231,9 +231,9 @@ spdk_accel_submit_dualcast(struct spdk_io_channel *ch, void *dst1, void *dst2, v
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accel_task->dst2 = dst2;
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accel_task->nbytes = nbytes;
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accel_task->flags = flags;
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accel_task->op_code = ACCEL_OPCODE_DUALCAST;
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accel_task->op_code = ACCEL_OPC_DUALCAST;
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if (_is_supported(accel_ch->engine, ACCEL_DUALCAST)) {
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if (_is_supported(accel_ch->engine, ACCEL_OPC_DUALCAST)) {
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return accel_ch->engine->submit_tasks(accel_ch->engine_ch, accel_task);
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} else {
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rc = _check_flags(flags);
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@ -263,9 +263,9 @@ spdk_accel_submit_compare(struct spdk_io_channel *ch, void *src1, void *src2, ui
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accel_task->src = src1;
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accel_task->src2 = src2;
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accel_task->nbytes = nbytes;
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accel_task->op_code = ACCEL_OPCODE_COMPARE;
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accel_task->op_code = ACCEL_OPC_COMPARE;
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if (_is_supported(accel_ch->engine, ACCEL_COMPARE)) {
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if (_is_supported(accel_ch->engine, ACCEL_OPC_COMPARE)) {
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return accel_ch->engine->submit_tasks(accel_ch->engine_ch, accel_task);
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} else {
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rc = _sw_accel_compare(src1, src2, (size_t)nbytes);
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@ -292,9 +292,9 @@ spdk_accel_submit_fill(struct spdk_io_channel *ch, void *dst, uint8_t fill, uint
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memset(&accel_task->fill_pattern, fill, sizeof(uint64_t));
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accel_task->nbytes = nbytes;
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accel_task->flags = flags;
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accel_task->op_code = ACCEL_OPCODE_MEMFILL;
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accel_task->op_code = ACCEL_OPC_FILL;
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if (_is_supported(accel_ch->engine, ACCEL_FILL)) {
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if (_is_supported(accel_ch->engine, ACCEL_OPC_FILL)) {
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return accel_ch->engine->submit_tasks(accel_ch->engine_ch, accel_task);
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} else {
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rc = _check_flags(flags);
|
||||
@ -325,9 +325,9 @@ spdk_accel_submit_crc32c(struct spdk_io_channel *ch, uint32_t *crc_dst, void *sr
|
||||
accel_task->v.iovcnt = 0;
|
||||
accel_task->seed = seed;
|
||||
accel_task->nbytes = nbytes;
|
||||
accel_task->op_code = ACCEL_OPCODE_CRC32C;
|
||||
accel_task->op_code = ACCEL_OPC_CRC32C;
|
||||
|
||||
if (_is_supported(accel_ch->engine, ACCEL_CRC32C)) {
|
||||
if (_is_supported(accel_ch->engine, ACCEL_OPC_CRC32C)) {
|
||||
return accel_ch->engine->submit_tasks(accel_ch->engine_ch, accel_task);
|
||||
} else {
|
||||
_sw_accel_crc32c(crc_dst, src, seed, (size_t)nbytes);
|
||||
@ -366,9 +366,9 @@ spdk_accel_submit_crc32cv(struct spdk_io_channel *ch, uint32_t *crc_dst, struct
|
||||
accel_task->v.iovcnt = iov_cnt;
|
||||
accel_task->crc_dst = crc_dst;
|
||||
accel_task->seed = seed;
|
||||
accel_task->op_code = ACCEL_OPCODE_CRC32C;
|
||||
accel_task->op_code = ACCEL_OPC_CRC32C;
|
||||
|
||||
if (_is_supported(accel_ch->engine, ACCEL_CRC32C)) {
|
||||
if (_is_supported(accel_ch->engine, ACCEL_OPC_CRC32C)) {
|
||||
return accel_ch->engine->submit_tasks(accel_ch->engine_ch, accel_task);
|
||||
} else {
|
||||
_sw_accel_crc32cv(crc_dst, iov, iov_cnt, seed);
|
||||
@ -399,9 +399,9 @@ spdk_accel_submit_copy_crc32c(struct spdk_io_channel *ch, void *dst, void *src,
|
||||
accel_task->seed = seed;
|
||||
accel_task->nbytes = nbytes;
|
||||
accel_task->flags = flags;
|
||||
accel_task->op_code = ACCEL_OPCODE_COPY_CRC32C;
|
||||
accel_task->op_code = ACCEL_OPC_COPY_CRC32C;
|
||||
|
||||
if (_is_supported(accel_ch->engine, ACCEL_COPY_CRC32C)) {
|
||||
if (_is_supported(accel_ch->engine, ACCEL_OPC_COPY_CRC32C)) {
|
||||
return accel_ch->engine->submit_tasks(accel_ch->engine_ch, accel_task);
|
||||
} else {
|
||||
rc = _check_flags(flags);
|
||||
@ -449,9 +449,9 @@ spdk_accel_submit_copy_crc32cv(struct spdk_io_channel *ch, void *dst, struct iov
|
||||
accel_task->crc_dst = crc_dst;
|
||||
accel_task->seed = seed;
|
||||
accel_task->flags = flags;
|
||||
accel_task->op_code = ACCEL_OPCODE_COPY_CRC32C;
|
||||
accel_task->op_code = ACCEL_OPC_COPY_CRC32C;
|
||||
|
||||
if (_is_supported(accel_ch->engine, ACCEL_COPY_CRC32C)) {
|
||||
if (_is_supported(accel_ch->engine, ACCEL_OPC_COPY_CRC32C)) {
|
||||
return accel_ch->engine->submit_tasks(accel_ch->engine_ch, accel_task);
|
||||
} else {
|
||||
rc = _check_flags(flags);
|
||||
@ -509,7 +509,6 @@ accel_engine_create_cb(void *io_device, void *ctx_buf)
|
||||
accel_ch->engine = g_sw_accel_engine;
|
||||
}
|
||||
assert(accel_ch->engine_ch != NULL);
|
||||
accel_ch->engine->capabilities = accel_ch->engine->get_capabilities();
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -623,11 +622,10 @@ spdk_accel_engine_finish(spdk_accel_fini_cb cb_fn, void *cb_arg)
|
||||
/*
|
||||
* The SW Accelerator module is "built in" here (rest of file)
|
||||
*/
|
||||
static uint64_t
|
||||
sw_accel_get_capabilities(void)
|
||||
static bool
|
||||
sw_accel_supports_opcode(enum accel_opcode opc)
|
||||
{
|
||||
/* No HW acceleration capabilities. */
|
||||
return 0;
|
||||
return false;
|
||||
}
|
||||
|
||||
static inline void
|
||||
@ -731,7 +729,7 @@ static struct spdk_io_channel *sw_accel_get_io_channel(void);
|
||||
|
||||
|
||||
static struct spdk_accel_engine sw_accel_engine = {
|
||||
.get_capabilities = sw_accel_get_capabilities,
|
||||
.supports_opcode = sw_accel_supports_opcode,
|
||||
.get_io_channel = sw_accel_get_io_channel,
|
||||
};
|
||||
|
||||
|
@ -151,7 +151,7 @@ _process_single_task(struct spdk_io_channel *ch, struct spdk_accel_task *task)
|
||||
int flags = 0;
|
||||
|
||||
switch (task->op_code) {
|
||||
case ACCEL_OPCODE_MEMMOVE:
|
||||
case ACCEL_OPC_COPY:
|
||||
siov.iov_base = task->src;
|
||||
siov.iov_len = task->nbytes;
|
||||
diov.iov_base = task->dst;
|
||||
@ -162,7 +162,7 @@ _process_single_task(struct spdk_io_channel *ch, struct spdk_accel_task *task)
|
||||
}
|
||||
rc = spdk_idxd_submit_copy(chan->chan, &diov, 1, &siov, 1, flags, idxd_done, task);
|
||||
break;
|
||||
case ACCEL_OPCODE_DUALCAST:
|
||||
case ACCEL_OPC_DUALCAST:
|
||||
if (task->flags & ACCEL_FLAG_PERSISTENT) {
|
||||
flags |= SPDK_IDXD_FLAG_PERSISTENT;
|
||||
flags |= SPDK_IDXD_FLAG_NONTEMPORAL;
|
||||
@ -170,14 +170,14 @@ _process_single_task(struct spdk_io_channel *ch, struct spdk_accel_task *task)
|
||||
rc = spdk_idxd_submit_dualcast(chan->chan, task->dst, task->dst2, task->src, task->nbytes,
|
||||
flags, idxd_done, task);
|
||||
break;
|
||||
case ACCEL_OPCODE_COMPARE:
|
||||
case ACCEL_OPC_COMPARE:
|
||||
siov.iov_base = task->src;
|
||||
siov.iov_len = task->nbytes;
|
||||
diov.iov_base = task->dst;
|
||||
diov.iov_len = task->nbytes;
|
||||
rc = spdk_idxd_submit_compare(chan->chan, &siov, 1, &diov, 1, flags, idxd_done, task);
|
||||
break;
|
||||
case ACCEL_OPCODE_MEMFILL:
|
||||
case ACCEL_OPC_FILL:
|
||||
diov.iov_base = task->dst;
|
||||
diov.iov_len = task->nbytes;
|
||||
if (task->flags & ACCEL_FLAG_PERSISTENT) {
|
||||
@ -187,7 +187,7 @@ _process_single_task(struct spdk_io_channel *ch, struct spdk_accel_task *task)
|
||||
rc = spdk_idxd_submit_fill(chan->chan, &diov, 1, task->fill_pattern, flags, idxd_done,
|
||||
task);
|
||||
break;
|
||||
case ACCEL_OPCODE_CRC32C:
|
||||
case ACCEL_OPC_CRC32C:
|
||||
if (task->v.iovcnt == 0) {
|
||||
siov.iov_base = task->src;
|
||||
siov.iov_len = task->nbytes;
|
||||
@ -200,7 +200,7 @@ _process_single_task(struct spdk_io_channel *ch, struct spdk_accel_task *task)
|
||||
rc = spdk_idxd_submit_crc32c(chan->chan, iov, iovcnt, task->seed, task->crc_dst,
|
||||
flags, idxd_done, task);
|
||||
break;
|
||||
case ACCEL_OPCODE_COPY_CRC32C:
|
||||
case ACCEL_OPC_COPY_CRC32C:
|
||||
if (task->v.iovcnt == 0) {
|
||||
siov.iov_base = task->src;
|
||||
siov.iov_len = task->nbytes;
|
||||
@ -315,15 +315,24 @@ accel_engine_idxd_get_ctx_size(void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static uint64_t
|
||||
idxd_get_capabilities(void)
|
||||
static bool
|
||||
idxd_supports_opcode(enum accel_opcode opc)
|
||||
{
|
||||
return ACCEL_COPY | ACCEL_FILL | ACCEL_CRC32C | ACCEL_COMPARE |
|
||||
ACCEL_DUALCAST | ACCEL_COPY_CRC32C;
|
||||
switch (opc) {
|
||||
case ACCEL_OPC_COPY:
|
||||
case ACCEL_OPC_FILL:
|
||||
case ACCEL_OPC_DUALCAST:
|
||||
case ACCEL_OPC_COMPARE:
|
||||
case ACCEL_OPC_CRC32C:
|
||||
case ACCEL_OPC_COPY_CRC32C:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
static struct spdk_accel_engine idxd_accel_engine = {
|
||||
.get_capabilities = idxd_get_capabilities,
|
||||
.supports_opcode = idxd_supports_opcode,
|
||||
.get_io_channel = idxd_get_io_channel,
|
||||
.submit_tasks = idxd_submit_tasks,
|
||||
};
|
||||
|
@ -126,10 +126,17 @@ ioat_poll(void *arg)
|
||||
|
||||
static struct spdk_io_channel *ioat_get_io_channel(void);
|
||||
|
||||
static uint64_t
|
||||
ioat_get_capabilities(void)
|
||||
static bool
|
||||
ioat_supports_opcode(enum accel_opcode opc)
|
||||
{
|
||||
return ACCEL_COPY | ACCEL_FILL;
|
||||
switch (opc) {
|
||||
case ACCEL_OPC_COPY:
|
||||
case ACCEL_OPC_FILL:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
static int
|
||||
@ -146,11 +153,11 @@ ioat_submit_tasks(struct spdk_io_channel *ch, struct spdk_accel_task *accel_task
|
||||
|
||||
do {
|
||||
switch (accel_task->op_code) {
|
||||
case ACCEL_OPCODE_MEMFILL:
|
||||
case ACCEL_OPC_FILL:
|
||||
rc = spdk_ioat_build_fill(ioat_ch->ioat_ch, accel_task, ioat_done,
|
||||
accel_task->dst, accel_task->fill_pattern, accel_task->nbytes);
|
||||
break;
|
||||
case ACCEL_OPCODE_MEMMOVE:
|
||||
case ACCEL_OPC_COPY:
|
||||
rc = spdk_ioat_build_copy(ioat_ch->ioat_ch, accel_task, ioat_done,
|
||||
accel_task->dst, accel_task->src, accel_task->nbytes);
|
||||
break;
|
||||
@ -175,7 +182,7 @@ ioat_submit_tasks(struct spdk_io_channel *ch, struct spdk_accel_task *accel_task
|
||||
}
|
||||
|
||||
static struct spdk_accel_engine ioat_accel_engine = {
|
||||
.get_capabilities = ioat_get_capabilities,
|
||||
.supports_opcode = ioat_supports_opcode,
|
||||
.get_io_channel = ioat_get_io_channel,
|
||||
.submit_tasks = ioat_submit_tasks,
|
||||
};
|
||||
|
@ -53,6 +53,23 @@ struct accel_io_channel *g_accel_ch = NULL;
|
||||
struct sw_accel_io_channel *g_sw_ch = NULL;
|
||||
struct spdk_io_channel *g_engine_ch = NULL;
|
||||
|
||||
static uint64_t g_opc_mask = 0;
|
||||
|
||||
static uint64_t
|
||||
_accel_op_to_bit(enum accel_opcode opc)
|
||||
{
|
||||
return (1 << opc);
|
||||
}
|
||||
|
||||
static bool
|
||||
_supports_opcode(enum accel_opcode opc)
|
||||
{
|
||||
if (_accel_op_to_bit(opc) & g_opc_mask) {
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
static int
|
||||
test_setup(void)
|
||||
{
|
||||
@ -73,6 +90,7 @@ test_setup(void)
|
||||
g_sw_ch = (struct sw_accel_io_channel *)((char *)g_accel_ch->sw_engine_ch + sizeof(
|
||||
struct spdk_io_channel));
|
||||
TAILQ_INIT(&g_sw_ch->tasks_to_complete);
|
||||
g_accel_engine.supports_opcode = _supports_opcode;
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -121,13 +139,14 @@ test_accel_sw_unregister(void)
|
||||
static void
|
||||
test_is_supported(void)
|
||||
{
|
||||
g_accel_engine.capabilities = ACCEL_COPY | ACCEL_DUALCAST | ACCEL_CRC32C;
|
||||
CU_ASSERT(_is_supported(&g_accel_engine, ACCEL_COPY) == true);
|
||||
CU_ASSERT(_is_supported(&g_accel_engine, ACCEL_FILL) == false);
|
||||
CU_ASSERT(_is_supported(&g_accel_engine, ACCEL_DUALCAST) == true);
|
||||
CU_ASSERT(_is_supported(&g_accel_engine, ACCEL_COMPARE) == false);
|
||||
CU_ASSERT(_is_supported(&g_accel_engine, ACCEL_CRC32C) == true);
|
||||
CU_ASSERT(_is_supported(&g_accel_engine, ACCEL_DIF) == false);
|
||||
g_opc_mask = _accel_op_to_bit(ACCEL_OPC_COPY) | _accel_op_to_bit(
|
||||
ACCEL_OPC_DUALCAST) |
|
||||
_accel_op_to_bit(ACCEL_OPC_CRC32C);
|
||||
CU_ASSERT(_is_supported(&g_accel_engine, ACCEL_OPC_COPY) == true);
|
||||
CU_ASSERT(_is_supported(&g_accel_engine, ACCEL_OPC_FILL) == false);
|
||||
CU_ASSERT(_is_supported(&g_accel_engine, ACCEL_OPC_DUALCAST) == true);
|
||||
CU_ASSERT(_is_supported(&g_accel_engine, ACCEL_OPC_COMPARE) == false);
|
||||
CU_ASSERT(_is_supported(&g_accel_engine, ACCEL_OPC_CRC32C) == true);
|
||||
}
|
||||
|
||||
#define DUMMY_ARG 0xDEADBEEF
|
||||
@ -229,7 +248,7 @@ test_spdk_accel_submit_copy(void)
|
||||
TAILQ_INSERT_TAIL(&g_accel_ch->task_pool, &task, link);
|
||||
|
||||
g_accel_ch->engine = &g_accel_engine;
|
||||
g_accel_ch->engine->capabilities = ACCEL_COPY;
|
||||
g_opc_mask = _accel_op_to_bit(ACCEL_OPC_COPY);
|
||||
g_accel_ch->engine->submit_tasks = dummy_submit_tasks;
|
||||
|
||||
/* HW accel submission OK. */
|
||||
@ -237,7 +256,7 @@ test_spdk_accel_submit_copy(void)
|
||||
CU_ASSERT(rc == 0);
|
||||
CU_ASSERT(task.dst == dst);
|
||||
CU_ASSERT(task.src == src);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPCODE_MEMMOVE);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPC_COPY);
|
||||
CU_ASSERT(task.nbytes == nbytes);
|
||||
CU_ASSERT(task.flags == 0);
|
||||
CU_ASSERT(g_dummy_submit_called == true);
|
||||
@ -245,7 +264,7 @@ test_spdk_accel_submit_copy(void)
|
||||
TAILQ_INSERT_TAIL(&g_accel_ch->task_pool, &task, link);
|
||||
/* reset values before next case */
|
||||
g_dummy_submit_called = false;
|
||||
g_accel_ch->engine->capabilities = 0;
|
||||
g_opc_mask = 0;
|
||||
task.dst = 0;
|
||||
task.src = 0;
|
||||
task.op_code = 0xff;
|
||||
@ -257,7 +276,7 @@ test_spdk_accel_submit_copy(void)
|
||||
CU_ASSERT(rc == 0);
|
||||
CU_ASSERT(task.dst == dst);
|
||||
CU_ASSERT(task.src == src);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPCODE_MEMMOVE);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPC_COPY);
|
||||
CU_ASSERT(task.nbytes == nbytes);
|
||||
CU_ASSERT(task.flags == 0);
|
||||
CU_ASSERT(g_dummy_submit_cb_called == false);
|
||||
@ -318,7 +337,7 @@ test_spdk_accel_submit_dualcast(void)
|
||||
TAILQ_INSERT_TAIL(&g_accel_ch->task_pool, &task, link);
|
||||
|
||||
g_accel_ch->engine = &g_accel_engine;
|
||||
g_accel_ch->engine->capabilities = ACCEL_DUALCAST;
|
||||
g_opc_mask = _accel_op_to_bit(ACCEL_OPC_DUALCAST);
|
||||
g_accel_ch->engine->submit_tasks = dummy_submit_tasks;
|
||||
|
||||
/* HW accel submission OK. */
|
||||
@ -328,7 +347,7 @@ test_spdk_accel_submit_dualcast(void)
|
||||
CU_ASSERT(task.dst == dst1);
|
||||
CU_ASSERT(task.dst2 == dst2);
|
||||
CU_ASSERT(task.src == src);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPCODE_DUALCAST);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPC_DUALCAST);
|
||||
CU_ASSERT(task.nbytes == nbytes);
|
||||
CU_ASSERT(task.flags == 0);
|
||||
CU_ASSERT(g_dummy_submit_called == true);
|
||||
@ -336,7 +355,7 @@ test_spdk_accel_submit_dualcast(void)
|
||||
TAILQ_INSERT_TAIL(&g_accel_ch->task_pool, &task, link);
|
||||
/* Reset values before next case */
|
||||
g_dummy_submit_called = false;
|
||||
g_accel_ch->engine->capabilities = 0;
|
||||
g_opc_mask = 0;
|
||||
task.dst = 0;
|
||||
task.dst2 = 0;
|
||||
task.src = 0;
|
||||
@ -357,7 +376,7 @@ test_spdk_accel_submit_dualcast(void)
|
||||
CU_ASSERT(task.dst == dst1);
|
||||
CU_ASSERT(task.dst2 == dst2);
|
||||
CU_ASSERT(task.src == src);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPCODE_DUALCAST);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPC_DUALCAST);
|
||||
CU_ASSERT(task.nbytes == nbytes);
|
||||
CU_ASSERT(task.flags == 0);
|
||||
CU_ASSERT(g_dummy_submit_cb_called == false);
|
||||
@ -399,7 +418,7 @@ test_spdk_accel_submit_compare(void)
|
||||
TAILQ_INSERT_TAIL(&g_accel_ch->task_pool, &task, link);
|
||||
|
||||
g_accel_ch->engine = &g_accel_engine;
|
||||
g_accel_ch->engine->capabilities = ACCEL_COMPARE;
|
||||
g_opc_mask = _accel_op_to_bit(ACCEL_OPC_COMPARE);
|
||||
g_accel_ch->engine->submit_tasks = dummy_submit_tasks;
|
||||
|
||||
/* HW accel submission OK. */
|
||||
@ -407,14 +426,14 @@ test_spdk_accel_submit_compare(void)
|
||||
CU_ASSERT(rc == 0);
|
||||
CU_ASSERT(task.src == src1);
|
||||
CU_ASSERT(task.src2 == src2);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPCODE_COMPARE);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPC_COMPARE);
|
||||
CU_ASSERT(task.nbytes == nbytes);
|
||||
CU_ASSERT(g_dummy_submit_called == true);
|
||||
|
||||
TAILQ_INSERT_TAIL(&g_accel_ch->task_pool, &task, link);
|
||||
/* Reset values before next case */
|
||||
g_dummy_submit_called = false;
|
||||
g_accel_ch->engine->capabilities = 0;
|
||||
g_opc_mask = 0;
|
||||
task.src = 0;
|
||||
task.src2 = 0;
|
||||
task.op_code = 0xff;
|
||||
@ -428,7 +447,7 @@ test_spdk_accel_submit_compare(void)
|
||||
CU_ASSERT(rc == 0);
|
||||
CU_ASSERT(task.src == src1);
|
||||
CU_ASSERT(task.src2 == src2);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPCODE_COMPARE);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPC_COMPARE);
|
||||
CU_ASSERT(task.nbytes == nbytes);
|
||||
CU_ASSERT(g_dummy_submit_cb_called == false);
|
||||
CU_ASSERT(memcmp(src1, src2, TEST_SUBMIT_SIZE) == 0);
|
||||
@ -472,7 +491,7 @@ test_spdk_accel_submit_fill(void)
|
||||
TAILQ_INSERT_TAIL(&g_accel_ch->task_pool, &task, link);
|
||||
|
||||
g_accel_ch->engine = &g_accel_engine;
|
||||
g_accel_ch->engine->capabilities = ACCEL_FILL;
|
||||
g_opc_mask = _accel_op_to_bit(ACCEL_OPC_FILL);
|
||||
g_accel_ch->engine->submit_tasks = dummy_submit_tasks;
|
||||
|
||||
/* HW accel submission OK. */
|
||||
@ -480,7 +499,7 @@ test_spdk_accel_submit_fill(void)
|
||||
CU_ASSERT(rc == 0);
|
||||
CU_ASSERT(task.dst == dst);
|
||||
CU_ASSERT(task.fill_pattern == fill64);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPCODE_MEMFILL);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPC_FILL);
|
||||
CU_ASSERT(task.nbytes == nbytes);
|
||||
CU_ASSERT(task.flags == 0);
|
||||
CU_ASSERT(g_dummy_submit_called == true);
|
||||
@ -488,7 +507,7 @@ test_spdk_accel_submit_fill(void)
|
||||
TAILQ_INSERT_TAIL(&g_accel_ch->task_pool, &task, link);
|
||||
/* Reset values before next case */
|
||||
g_dummy_submit_called = false;
|
||||
g_accel_ch->engine->capabilities = 0;
|
||||
g_opc_mask = 0;
|
||||
task.dst = 0;
|
||||
task.fill_pattern = 0;
|
||||
task.op_code = 0xff;
|
||||
@ -500,7 +519,7 @@ test_spdk_accel_submit_fill(void)
|
||||
CU_ASSERT(rc == 0);
|
||||
CU_ASSERT(task.dst == dst);
|
||||
CU_ASSERT(task.fill_pattern == fill64);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPCODE_MEMFILL);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPC_FILL);
|
||||
CU_ASSERT(task.nbytes == nbytes);
|
||||
CU_ASSERT(task.flags == 0);
|
||||
CU_ASSERT(g_dummy_submit_cb_called == false);
|
||||
@ -536,7 +555,7 @@ test_spdk_accel_submit_crc32c(void)
|
||||
TAILQ_INSERT_TAIL(&g_accel_ch->task_pool, &task, link);
|
||||
|
||||
g_accel_ch->engine = &g_accel_engine;
|
||||
g_accel_ch->engine->capabilities = ACCEL_CRC32C;
|
||||
g_opc_mask = _accel_op_to_bit(ACCEL_OPC_CRC32C);
|
||||
g_accel_ch->engine->submit_tasks = dummy_submit_tasks;
|
||||
|
||||
/* HW accel submission OK. */
|
||||
@ -546,14 +565,14 @@ test_spdk_accel_submit_crc32c(void)
|
||||
CU_ASSERT(task.src == src);
|
||||
CU_ASSERT(task.v.iovcnt == 0);
|
||||
CU_ASSERT(task.seed == seed);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPCODE_CRC32C);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPC_CRC32C);
|
||||
CU_ASSERT(task.nbytes == nbytes);
|
||||
CU_ASSERT(g_dummy_submit_called == true);
|
||||
|
||||
TAILQ_INSERT_TAIL(&g_accel_ch->task_pool, &task, link);
|
||||
/* Reset values before next case */
|
||||
g_dummy_submit_called = false;
|
||||
g_accel_ch->engine->capabilities = 0;
|
||||
g_opc_mask = 0;
|
||||
task.crc_dst = 0;
|
||||
task.src = 0;
|
||||
task.seed = 0;
|
||||
@ -567,7 +586,7 @@ test_spdk_accel_submit_crc32c(void)
|
||||
CU_ASSERT(task.src == src);
|
||||
CU_ASSERT(task.v.iovcnt == 0);
|
||||
CU_ASSERT(task.seed == seed);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPCODE_CRC32C);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPC_CRC32C);
|
||||
CU_ASSERT(task.nbytes == nbytes);
|
||||
CU_ASSERT(g_dummy_submit_cb_called == false);
|
||||
expected_accel_task = TAILQ_FIRST(&g_sw_ch->tasks_to_complete);
|
||||
@ -599,7 +618,7 @@ test_spdk_accel_submit_crc32c_hw_engine_unsupported(void)
|
||||
|
||||
g_accel_ch->engine = &g_accel_engine;
|
||||
/* HW engine only supports COPY and does not support CRC */
|
||||
g_accel_ch->engine->capabilities = ACCEL_COPY;
|
||||
g_opc_mask = _accel_op_to_bit(ACCEL_OPC_COPY);
|
||||
g_accel_ch->engine->submit_tasks = dummy_submit_tasks;
|
||||
|
||||
/* Summit to HW engine while eventually handled by SW engine. */
|
||||
@ -609,7 +628,7 @@ test_spdk_accel_submit_crc32c_hw_engine_unsupported(void)
|
||||
CU_ASSERT(task.src == src);
|
||||
CU_ASSERT(task.v.iovcnt == 0);
|
||||
CU_ASSERT(task.seed == seed);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPCODE_CRC32C);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPC_CRC32C);
|
||||
CU_ASSERT(task.nbytes == nbytes);
|
||||
/* Not set in HW engine callback while handled by SW engine instead. */
|
||||
CU_ASSERT(g_dummy_submit_called == false);
|
||||
@ -647,7 +666,7 @@ test_spdk_accel_submit_crc32cv(void)
|
||||
TAILQ_INSERT_TAIL(&g_accel_ch->task_pool, &task, link);
|
||||
|
||||
g_accel_ch->engine = &g_accel_engine;
|
||||
g_accel_ch->engine->capabilities = ACCEL_CRC32C;
|
||||
g_opc_mask = _accel_op_to_bit(ACCEL_OPC_CRC32C);
|
||||
g_accel_ch->engine->submit_tasks = dummy_submit_tasks;
|
||||
|
||||
/* HW accel submission OK. */
|
||||
@ -657,7 +676,7 @@ test_spdk_accel_submit_crc32cv(void)
|
||||
CU_ASSERT(task.v.iovcnt == iov_cnt);
|
||||
CU_ASSERT(task.crc_dst == &crc_dst);
|
||||
CU_ASSERT(task.seed == seed);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPCODE_CRC32C);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPC_CRC32C);
|
||||
CU_ASSERT(g_dummy_submit_called == true);
|
||||
CU_ASSERT(task.cb_fn == dummy_submit_cb_fn);
|
||||
CU_ASSERT(task.cb_arg == cb_arg);
|
||||
@ -665,7 +684,7 @@ test_spdk_accel_submit_crc32cv(void)
|
||||
|
||||
TAILQ_INSERT_TAIL(&g_accel_ch->task_pool, &task, link);
|
||||
g_dummy_submit_called = false;
|
||||
g_accel_ch->engine->capabilities = 0;
|
||||
g_opc_mask = 0;
|
||||
task.v.iovs = 0;
|
||||
task.v.iovcnt = 0;
|
||||
task.crc_dst = 0;
|
||||
@ -679,7 +698,7 @@ test_spdk_accel_submit_crc32cv(void)
|
||||
CU_ASSERT(task.v.iovcnt == iov_cnt);
|
||||
CU_ASSERT(task.crc_dst == &crc_dst);
|
||||
CU_ASSERT(task.seed == seed);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPCODE_CRC32C);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPC_CRC32C);
|
||||
CU_ASSERT(g_dummy_submit_cb_called == false);
|
||||
|
||||
expected_accel_task = TAILQ_FIRST(&g_sw_ch->tasks_to_complete);
|
||||
@ -718,7 +737,7 @@ test_spdk_accel_submit_copy_crc32c(void)
|
||||
TAILQ_INSERT_TAIL(&g_accel_ch->task_pool, &task, link);
|
||||
|
||||
g_accel_ch->engine = &g_accel_engine;
|
||||
g_accel_ch->engine->capabilities = ACCEL_COPY_CRC32C;
|
||||
g_opc_mask = _accel_op_to_bit(ACCEL_OPC_COPY_CRC32C);
|
||||
g_accel_ch->engine->submit_tasks = dummy_submit_tasks;
|
||||
|
||||
/* HW accel submission OK. */
|
||||
@ -733,11 +752,12 @@ test_spdk_accel_submit_copy_crc32c(void)
|
||||
CU_ASSERT(task.seed == seed);
|
||||
CU_ASSERT(task.nbytes == nbytes);
|
||||
CU_ASSERT(task.flags == 0);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPCODE_COPY_CRC32C);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPC_COPY_CRC32C);
|
||||
CU_ASSERT(g_dummy_submit_called == true);
|
||||
|
||||
TAILQ_INSERT_TAIL(&g_accel_ch->task_pool, &task, link);
|
||||
g_dummy_submit_called = false;
|
||||
g_opc_mask = 0;
|
||||
task.dst = 0;
|
||||
task.src = 0;
|
||||
task.crc_dst = 0;
|
||||
@ -746,7 +766,6 @@ test_spdk_accel_submit_copy_crc32c(void)
|
||||
task.nbytes = 0;
|
||||
task.flags = 1;
|
||||
task.op_code = 0xff;
|
||||
g_accel_ch->engine->capabilities = 0;
|
||||
memset(src, 0x5A, TEST_SUBMIT_SIZE);
|
||||
|
||||
/* SW engine does copy crc. */
|
||||
@ -762,7 +781,7 @@ test_spdk_accel_submit_copy_crc32c(void)
|
||||
CU_ASSERT(task.seed == seed);
|
||||
CU_ASSERT(task.nbytes == nbytes);
|
||||
CU_ASSERT(task.flags == 0);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPCODE_COPY_CRC32C);
|
||||
CU_ASSERT(task.op_code == ACCEL_OPC_COPY_CRC32C);
|
||||
CU_ASSERT(g_dummy_submit_cb_called == false);
|
||||
expected_accel_task = TAILQ_FIRST(&g_sw_ch->tasks_to_complete);
|
||||
TAILQ_REMOVE(&g_sw_ch->tasks_to_complete, expected_accel_task, link);
|
||||
|
Loading…
Reference in New Issue
Block a user