IDXD has always been used everywhere but technically it stands for the driver, not the HW (Intel Data Streaming Accelerator Driver) where the X comes from "Streaming Accelerator" somehow. Anyway, the underlying hardware is just DSA. It doesn't matter much now but upcoming patches will add support for a new HW accelerator called the Intel In-Memory Analytics Accelerator which we'll call IAA and it will use the same (mostly) device driver (IDXD) as DSA. So, calling the HW what it is will lessen confusion when adding IAA support. This patch just does renaming for the accel_fw module and associated files (RPC, etc). Signed-off-by: paul luse <paul.e.luse@intel.com> Change-Id: Ib3b1f982cc60359ecfea5dbcbeeb33e4d69aee6a Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/11984 Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com> Community-CI: Mellanox Build Bot Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
479 lines
12 KiB
C
479 lines
12 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright (c) Intel Corporation.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "accel_engine_dsa.h"
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#include "spdk/stdinc.h"
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#include "spdk_internal/accel_engine.h"
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#include "spdk/log.h"
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#include "spdk_internal/idxd.h"
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#include "spdk/env.h"
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#include "spdk/event.h"
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#include "spdk/thread.h"
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#include "spdk/idxd.h"
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#include "spdk/util.h"
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#include "spdk/json.h"
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#include "spdk/trace.h"
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#include "spdk_internal/trace_defs.h"
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static bool g_dsa_enable = false;
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static bool g_kernel_mode = false;
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enum channel_state {
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IDXD_CHANNEL_ACTIVE,
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IDXD_CHANNEL_ERROR,
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};
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static bool g_dsa_initialized = false;
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struct idxd_device {
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struct spdk_idxd_device *dsa;
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TAILQ_ENTRY(idxd_device) tailq;
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};
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static TAILQ_HEAD(, idxd_device) g_dsa_devices = TAILQ_HEAD_INITIALIZER(g_dsa_devices);
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static struct idxd_device *g_next_dev = NULL;
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static uint32_t g_num_devices = 0;
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static pthread_mutex_t g_dev_lock = PTHREAD_MUTEX_INITIALIZER;
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struct idxd_io_channel {
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struct spdk_idxd_io_channel *chan;
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struct idxd_device *dev;
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enum channel_state state;
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struct spdk_poller *poller;
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uint32_t num_outstanding;
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TAILQ_HEAD(, spdk_accel_task) queued_tasks;
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};
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static struct spdk_io_channel *dsa_get_io_channel(void);
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static struct idxd_device *
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idxd_select_device(struct idxd_io_channel *chan)
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{
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uint32_t count = 0;
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struct idxd_device *dev;
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uint32_t socket_id = spdk_env_get_socket_id(spdk_env_get_current_core());
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/*
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* We allow channels to share underlying devices,
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* selection is round-robin based with a limitation
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* on how many channel can share one device.
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*/
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do {
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/* select next device */
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pthread_mutex_lock(&g_dev_lock);
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g_next_dev = TAILQ_NEXT(g_next_dev, tailq);
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if (g_next_dev == NULL) {
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g_next_dev = TAILQ_FIRST(&g_dsa_devices);
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}
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dev = g_next_dev;
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pthread_mutex_unlock(&g_dev_lock);
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if (socket_id != spdk_idxd_get_socket(dev->dsa)) {
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continue;
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}
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/*
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* Now see if a channel is available on this one. We only
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* allow a specific number of channels to share a device
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* to limit outstanding IO for flow control purposes.
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*/
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chan->chan = spdk_idxd_get_channel(dev->dsa);
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if (chan->chan != NULL) {
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SPDK_DEBUGLOG(accel_dsa, "On socket %d using device on socket %d\n",
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socket_id, spdk_idxd_get_socket(dev->dsa));
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return dev;
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}
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} while (count++ < g_num_devices);
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/* We are out of available channels and/or devices for the local socket. We fix the number
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* of channels that we allocate per device and only allocate devices on the same socket
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* that the current thread is on. If on a 2 socket system it may be possible to avoid
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* this situation by spreading threads across the sockets.
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*/
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SPDK_ERRLOG("No more DSA devices available on the local socket.\n");
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return NULL;
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}
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static void
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dsa_done(void *cb_arg, int status)
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{
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struct spdk_accel_task *accel_task = cb_arg;
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struct idxd_io_channel *chan;
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chan = spdk_io_channel_get_ctx(accel_task->accel_ch->engine_ch[accel_task->op_code]);
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assert(chan->num_outstanding > 0);
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spdk_trace_record(TRACE_ACCEL_DSA_OP_COMPLETE, 0, 0, 0, chan->num_outstanding - 1);
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chan->num_outstanding--;
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spdk_accel_task_complete(accel_task, status);
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}
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static int
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_process_single_task(struct spdk_io_channel *ch, struct spdk_accel_task *task)
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{
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struct idxd_io_channel *chan = spdk_io_channel_get_ctx(ch);
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int rc = 0;
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struct iovec *iov;
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uint32_t iovcnt;
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struct iovec siov = {};
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struct iovec diov = {};
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int flags = 0;
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switch (task->op_code) {
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case ACCEL_OPC_COPY:
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siov.iov_base = task->src;
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siov.iov_len = task->nbytes;
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diov.iov_base = task->dst;
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diov.iov_len = task->nbytes;
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if (task->flags & ACCEL_FLAG_PERSISTENT) {
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flags |= SPDK_IDXD_FLAG_PERSISTENT;
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flags |= SPDK_IDXD_FLAG_NONTEMPORAL;
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}
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rc = spdk_idxd_submit_copy(chan->chan, &diov, 1, &siov, 1, flags, dsa_done, task);
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break;
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case ACCEL_OPC_DUALCAST:
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if (task->flags & ACCEL_FLAG_PERSISTENT) {
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flags |= SPDK_IDXD_FLAG_PERSISTENT;
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flags |= SPDK_IDXD_FLAG_NONTEMPORAL;
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}
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rc = spdk_idxd_submit_dualcast(chan->chan, task->dst, task->dst2, task->src, task->nbytes,
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flags, dsa_done, task);
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break;
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case ACCEL_OPC_COMPARE:
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siov.iov_base = task->src;
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siov.iov_len = task->nbytes;
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diov.iov_base = task->dst;
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diov.iov_len = task->nbytes;
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rc = spdk_idxd_submit_compare(chan->chan, &siov, 1, &diov, 1, flags, dsa_done, task);
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break;
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case ACCEL_OPC_FILL:
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diov.iov_base = task->dst;
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diov.iov_len = task->nbytes;
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if (task->flags & ACCEL_FLAG_PERSISTENT) {
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flags |= SPDK_IDXD_FLAG_PERSISTENT;
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flags |= SPDK_IDXD_FLAG_NONTEMPORAL;
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}
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rc = spdk_idxd_submit_fill(chan->chan, &diov, 1, task->fill_pattern, flags, dsa_done,
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task);
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break;
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case ACCEL_OPC_CRC32C:
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if (task->v.iovcnt == 0) {
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siov.iov_base = task->src;
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siov.iov_len = task->nbytes;
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iov = &siov;
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iovcnt = 1;
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} else {
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iov = task->v.iovs;
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iovcnt = task->v.iovcnt;
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}
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rc = spdk_idxd_submit_crc32c(chan->chan, iov, iovcnt, task->seed, task->crc_dst,
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flags, dsa_done, task);
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break;
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case ACCEL_OPC_COPY_CRC32C:
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if (task->v.iovcnt == 0) {
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siov.iov_base = task->src;
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siov.iov_len = task->nbytes;
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iov = &siov;
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iovcnt = 1;
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} else {
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iov = task->v.iovs;
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iovcnt = task->v.iovcnt;
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}
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diov.iov_base = task->dst;
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diov.iov_len = task->nbytes;
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if (task->flags & ACCEL_FLAG_PERSISTENT) {
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flags |= SPDK_IDXD_FLAG_PERSISTENT;
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flags |= SPDK_IDXD_FLAG_NONTEMPORAL;
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}
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rc = spdk_idxd_submit_copy_crc32c(chan->chan, &diov, 1, iov, iovcnt,
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task->seed, task->crc_dst, flags,
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dsa_done, task);
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break;
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default:
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assert(false);
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rc = -EINVAL;
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break;
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}
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if (rc == 0) {
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chan->num_outstanding++;
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spdk_trace_record(TRACE_ACCEL_DSA_OP_SUBMIT, 0, 0, 0, chan->num_outstanding);
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}
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return rc;
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}
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static int
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dsa_submit_tasks(struct spdk_io_channel *ch, struct spdk_accel_task *first_task)
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{
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struct idxd_io_channel *chan = spdk_io_channel_get_ctx(ch);
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struct spdk_accel_task *task, *tmp;
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int rc = 0;
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task = first_task;
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if (chan->state == IDXD_CHANNEL_ERROR) {
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while (task) {
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tmp = TAILQ_NEXT(task, link);
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spdk_accel_task_complete(task, -EINVAL);
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task = tmp;
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}
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return 0;
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}
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if (!TAILQ_EMPTY(&chan->queued_tasks)) {
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goto queue_tasks;
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}
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/* The caller will either submit a single task or a group of tasks that are
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* linked together but they cannot be on a list. For example, see idxd_poll()
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* where a list of queued tasks is being resubmitted, the list they are on
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* is initialized after saving off the first task from the list which is then
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* passed in here. Similar thing is done in the accel framework.
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*/
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while (task) {
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tmp = TAILQ_NEXT(task, link);
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rc = _process_single_task(ch, task);
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if (rc == -EBUSY) {
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goto queue_tasks;
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} else if (rc) {
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spdk_accel_task_complete(task, rc);
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}
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task = tmp;
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}
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return 0;
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queue_tasks:
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while (task != NULL) {
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tmp = TAILQ_NEXT(task, link);
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TAILQ_INSERT_TAIL(&chan->queued_tasks, task, link);
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task = tmp;
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}
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return 0;
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}
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static int
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idxd_poll(void *arg)
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{
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struct idxd_io_channel *chan = arg;
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struct spdk_accel_task *task = NULL;
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int count;
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count = spdk_idxd_process_events(chan->chan);
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/* Check if there are any pending ops to process if the channel is active */
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if (chan->state == IDXD_CHANNEL_ACTIVE) {
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/* Submit queued tasks */
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if (!TAILQ_EMPTY(&chan->queued_tasks)) {
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task = TAILQ_FIRST(&chan->queued_tasks);
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TAILQ_INIT(&chan->queued_tasks);
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dsa_submit_tasks(task->accel_ch->engine_ch[task->op_code], task);
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}
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}
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return count > 0 ? SPDK_POLLER_BUSY : SPDK_POLLER_IDLE;
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}
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static size_t
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accel_engine_dsa_get_ctx_size(void)
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{
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return 0;
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}
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static bool
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dsa_supports_opcode(enum accel_opcode opc)
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{
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switch (opc) {
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case ACCEL_OPC_COPY:
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case ACCEL_OPC_FILL:
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case ACCEL_OPC_DUALCAST:
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case ACCEL_OPC_COMPARE:
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case ACCEL_OPC_CRC32C:
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case ACCEL_OPC_COPY_CRC32C:
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return true;
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default:
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return false;
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}
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}
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static struct spdk_accel_engine dsa_accel_engine = {
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.name = "dsa",
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.supports_opcode = dsa_supports_opcode,
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.get_io_channel = dsa_get_io_channel,
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.submit_tasks = dsa_submit_tasks,
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};
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static int
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dsa_create_cb(void *io_device, void *ctx_buf)
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{
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struct idxd_io_channel *chan = ctx_buf;
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struct idxd_device *dsa;
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dsa = idxd_select_device(chan);
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if (dsa == NULL) {
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SPDK_ERRLOG("Failed to get an idxd channel\n");
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return -EINVAL;
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}
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chan->dev = dsa;
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chan->poller = SPDK_POLLER_REGISTER(idxd_poll, chan, 0);
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TAILQ_INIT(&chan->queued_tasks);
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chan->num_outstanding = 0;
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chan->state = IDXD_CHANNEL_ACTIVE;
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return 0;
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}
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static void
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dsa_destroy_cb(void *io_device, void *ctx_buf)
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{
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struct idxd_io_channel *chan = ctx_buf;
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spdk_poller_unregister(&chan->poller);
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spdk_idxd_put_channel(chan->chan);
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}
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static struct spdk_io_channel *
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dsa_get_io_channel(void)
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{
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return spdk_get_io_channel(&dsa_accel_engine);
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}
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static void
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attach_cb(void *cb_ctx, struct spdk_idxd_device *idxd)
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{
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struct idxd_device *dev;
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dev = calloc(1, sizeof(*dev));
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if (dev == NULL) {
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SPDK_ERRLOG("Failed to allocate device struct\n");
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return;
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}
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dev->dsa = idxd;
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if (g_next_dev == NULL) {
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g_next_dev = dev;
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}
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TAILQ_INSERT_TAIL(&g_dsa_devices, dev, tailq);
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g_num_devices++;
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}
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void
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accel_engine_dsa_enable_probe(bool kernel_mode)
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{
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g_kernel_mode = kernel_mode;
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g_dsa_enable = true;
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spdk_idxd_set_config(g_kernel_mode);
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}
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static int
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accel_engine_dsa_init(void)
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{
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if (!g_dsa_enable) {
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return -EINVAL;
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}
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if (spdk_idxd_probe(NULL, attach_cb) != 0) {
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SPDK_ERRLOG("spdk_idxd_probe() failed\n");
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return -EINVAL;
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}
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if (TAILQ_EMPTY(&g_dsa_devices)) {
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SPDK_NOTICELOG("no available dsa devices\n");
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return -EINVAL;
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}
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g_dsa_initialized = true;
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SPDK_NOTICELOG("Accel framework DSA engine initialized.\n");
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spdk_accel_engine_register(&dsa_accel_engine);
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spdk_io_device_register(&dsa_accel_engine, dsa_create_cb, dsa_destroy_cb,
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sizeof(struct idxd_io_channel), "dsa_accel_engine");
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return 0;
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}
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static void
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accel_engine_dsa_exit(void *ctx)
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{
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struct idxd_device *dev;
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if (g_dsa_initialized) {
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spdk_io_device_unregister(&dsa_accel_engine, NULL);
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}
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while (!TAILQ_EMPTY(&g_dsa_devices)) {
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dev = TAILQ_FIRST(&g_dsa_devices);
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TAILQ_REMOVE(&g_dsa_devices, dev, tailq);
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spdk_idxd_detach(dev->dsa);
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free(dev);
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}
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spdk_accel_engine_module_finish();
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}
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static void
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accel_engine_dsa_write_config_json(struct spdk_json_write_ctx *w)
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{
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if (g_dsa_enable) {
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spdk_json_write_object_begin(w);
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spdk_json_write_named_string(w, "method", "dsa_scan_accel_engine");
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spdk_json_write_named_object_begin(w, "params");
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spdk_json_write_named_bool(w, "config_kernel_mode", g_kernel_mode);
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spdk_json_write_object_end(w);
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spdk_json_write_object_end(w);
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}
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}
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SPDK_TRACE_REGISTER_FN(dsa_trace, "dsa", TRACE_GROUP_ACCEL_DSA)
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{
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spdk_trace_register_description("DSA_OP_SUBMIT", TRACE_ACCEL_DSA_OP_SUBMIT, OWNER_NONE, OBJECT_NONE,
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0,
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SPDK_TRACE_ARG_TYPE_INT, "count");
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spdk_trace_register_description("DSA_OP_COMPLETE", TRACE_ACCEL_DSA_OP_COMPLETE, OWNER_NONE,
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OBJECT_NONE,
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0, SPDK_TRACE_ARG_TYPE_INT, "count");
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}
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|
|
SPDK_ACCEL_MODULE_REGISTER(accel_engine_dsa_init, accel_engine_dsa_exit,
|
|
accel_engine_dsa_write_config_json,
|
|
accel_engine_dsa_get_ctx_size)
|
|
|
|
SPDK_LOG_REGISTER_COMPONENT(accel_dsa)
|