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As described in the NVMe specification, a controller level reset includes the following actions: - the controller stops processing any outstanding admin or I/O commands; - all I/O SQs and CQs are deleted. In a full controller reset sequence for a PCIe controller, if we do a controller level reset first, we can abort outstanding commands after the hardware has actually been stopped. For NVMe-oF controller, each I/O qpair is an independent network connection and is disconnected safely. We do not want to change NVMe-oF controller. Fixes the issue #2360 Signed-off-by: Shuhei Matsumoto <smatsumoto@nvidia.com> Change-Id: If05febac74705bfd3df5abd15064c1203126e027 Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/12447 Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com> Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Aleksey Marchuk <alexeymar@nvidia.com> Reviewed-by: Michael Haeuptle <michaelhaeuptle@gmail.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> |
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