PCI_COMMAND register with offset 0x4 is 16 bits width. Change-Id: I86483e58a3ac680efaae6ff7edaadde8efc289f6 Signed-off-by: Changpeng Liu <changpeng.liu@intel.com> Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/2589 Community-CI: Mellanox Build Bot Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Tomasz Zawadzki <tomasz.zawadzki@intel.com> Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com> |
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.. | ||
nvme_ctrlr_cmd.c | ||
nvme_ctrlr_ocssd_cmd.c | ||
nvme_ctrlr.c | ||
nvme_ns_cmd.c | ||
nvme_ns_ocssd_cmd.c | ||
nvme_ns.c | ||
nvme_pcie.c | ||
nvme_poll_group.c | ||
nvme_qpair.c | ||
nvme_quirks.c | ||
nvme_rdma.c | ||
nvme_tcp.c | ||
nvme_uevent.c | ||
nvme.c | ||
Makefile |