There was no UT to process SGL for PDU, and add UT in this patch. Signed-off-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com> Change-Id: Icd07683ba94b584cd3c6e5a88fee78d512d5832d Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/458541 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Changpeng Liu <changpeng.liu@intel.com> Reviewed-by: Ziye Yang <ziye.yang@intel.com> Reviewed-by: Darek Stojaczyk <dariusz.stojaczyk@intel.com> Reviewed-by: Paul Luse <paul.e.luse@intel.com>
214 lines
7.4 KiB
C
214 lines
7.4 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright (c) Intel Corporation.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "spdk/stdinc.h"
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#include "spdk_cunit.h"
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#include "common/lib/test_env.c"
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#include "common/lib/test_sock.c"
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#include "nvme/nvme_tcp.c"
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SPDK_LOG_REGISTER_COMPONENT("nvme", SPDK_LOG_NVME)
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DEFINE_STUB(nvme_request_check_timeout, int, (struct nvme_request *req, uint16_t cid,
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struct spdk_nvme_ctrlr_process *active_proc, uint64_t now_tick), 1);
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DEFINE_STUB(nvme_qpair_submit_request,
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int, (struct spdk_nvme_qpair *qpair, struct nvme_request *req), 0);
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DEFINE_STUB(spdk_nvme_ctrlr_get_current_process, struct spdk_nvme_ctrlr_process *,
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(struct spdk_nvme_ctrlr *ctrlr), (struct spdk_nvme_ctrlr_process *)(uintptr_t)0x1);
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static void
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test_nvme_tcp_pdu_set_data_buf(void)
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{
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struct nvme_tcp_pdu pdu = {};
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struct iovec iov[NVME_TCP_MAX_SGL_DESCRIPTORS] = {};
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uint32_t data_len;
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uint64_t i;
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/* 1st case: input is a single SGL entry. */
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iov[0].iov_base = (void *)0xDEADBEEF;
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iov[0].iov_len = 4096;
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nvme_tcp_pdu_set_data_buf(&pdu, iov, 1, 1024, 512);
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CU_ASSERT(pdu.data_iovcnt == 1);
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CU_ASSERT((uint64_t)pdu.data_iov[0].iov_base == 0xDEADBEEF + 1024);
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CU_ASSERT(pdu.data_iov[0].iov_len == 512);
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/* 2nd case: simulate split on multiple SGL entries. */
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iov[0].iov_base = (void *)0xDEADBEEF;
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iov[0].iov_len = 4096;
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iov[1].iov_base = (void *)0xFEEDBEEF;
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iov[1].iov_len = 512 * 7;
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iov[2].iov_base = (void *)0xF00DF00D;
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iov[2].iov_len = 4096 * 2;
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nvme_tcp_pdu_set_data_buf(&pdu, iov, 3, 0, 2048);
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CU_ASSERT(pdu.data_iovcnt == 1);
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CU_ASSERT((uint64_t)pdu.data_iov[0].iov_base == 0xDEADBEEF);
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CU_ASSERT(pdu.data_iov[0].iov_len == 2048);
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nvme_tcp_pdu_set_data_buf(&pdu, iov, 3, 2048, 2048 + 512 * 3);
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CU_ASSERT(pdu.data_iovcnt == 2);
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CU_ASSERT((uint64_t)pdu.data_iov[0].iov_base == 0xDEADBEEF + 2048);
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CU_ASSERT(pdu.data_iov[0].iov_len == 2048);
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CU_ASSERT((uint64_t)pdu.data_iov[1].iov_base == 0xFEEDBEEF);
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CU_ASSERT(pdu.data_iov[1].iov_len == 512 * 3);
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nvme_tcp_pdu_set_data_buf(&pdu, iov, 3, 4096 + 512 * 3, 512 * 4 + 4096 * 2);
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CU_ASSERT(pdu.data_iovcnt == 2);
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CU_ASSERT((uint64_t)pdu.data_iov[0].iov_base == 0xFEEDBEEF + 512 * 3);
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CU_ASSERT(pdu.data_iov[0].iov_len == 512 * 4);
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CU_ASSERT((uint64_t)pdu.data_iov[1].iov_base == 0xF00DF00D);
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CU_ASSERT(pdu.data_iov[1].iov_len == 4096 * 2);
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/* 3rd case: Number of input SGL entries is equal to the number of PDU SGL
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* entries.
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*/
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data_len = 0;
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for (i = 0; i < NVME_TCP_MAX_SGL_DESCRIPTORS; i++) {
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iov[i].iov_base = (void *)(0xDEADBEEF + i);
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iov[i].iov_len = 512 * (i + 1);
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data_len += 512 * (i + 1);
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}
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nvme_tcp_pdu_set_data_buf(&pdu, iov, NVME_TCP_MAX_SGL_DESCRIPTORS, 0, data_len);
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CU_ASSERT(pdu.data_iovcnt == NVME_TCP_MAX_SGL_DESCRIPTORS);
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for (i = 0; i < NVME_TCP_MAX_SGL_DESCRIPTORS; i++) {
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CU_ASSERT((uint64_t)pdu.data_iov[i].iov_base == 0xDEADBEEF + i);
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CU_ASSERT(pdu.data_iov[i].iov_len == 512 * (i + 1));
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}
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}
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static void
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test_nvme_tcp_build_iovs(void)
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{
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struct nvme_tcp_pdu pdu = {};
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struct iovec iovs[4] = {};
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uint32_t mapped_length = 0;
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int rc;
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pdu.hdr.common.pdu_type = SPDK_NVME_TCP_PDU_TYPE_CAPSULE_CMD;
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pdu.hdr.common.hlen = sizeof(struct spdk_nvme_tcp_cmd);
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pdu.hdr.common.plen = pdu.hdr.common.hlen + SPDK_NVME_TCP_DIGEST_LEN + 4096 * 2 +
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SPDK_NVME_TCP_DIGEST_LEN;
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pdu.data_len = 4096 * 2;
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pdu.padding_len = 0;
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pdu.data_iov[0].iov_base = (void *)0xDEADBEEF;
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pdu.data_iov[0].iov_len = 4096 * 2;
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pdu.data_iovcnt = 1;
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rc = nvme_tcp_build_iovs(iovs, 4, &pdu, true, true, &mapped_length);
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CU_ASSERT(rc == 3);
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CU_ASSERT(iovs[0].iov_base == (void *)&pdu.hdr.raw);
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CU_ASSERT(iovs[0].iov_len == sizeof(struct spdk_nvme_tcp_cmd) + SPDK_NVME_TCP_DIGEST_LEN);
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CU_ASSERT(iovs[1].iov_base == (void *)0xDEADBEEF);
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CU_ASSERT(iovs[1].iov_len == 4096 * 2);
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CU_ASSERT(iovs[2].iov_base == (void *)pdu.data_digest);
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CU_ASSERT(iovs[2].iov_len == SPDK_NVME_TCP_DIGEST_LEN);
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CU_ASSERT(mapped_length == sizeof(struct spdk_nvme_tcp_cmd) + SPDK_NVME_TCP_DIGEST_LEN +
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4096 * 2 + SPDK_NVME_TCP_DIGEST_LEN);
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pdu.writev_offset += sizeof(struct spdk_nvme_tcp_cmd) + SPDK_NVME_TCP_DIGEST_LEN;
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rc = nvme_tcp_build_iovs(iovs, 6, &pdu, true, true, &mapped_length);
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CU_ASSERT(rc == 2);
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CU_ASSERT(iovs[0].iov_base == (void *)0xDEADBEEF);
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CU_ASSERT(iovs[0].iov_len == 4096 * 2);
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CU_ASSERT(iovs[1].iov_base == (void *)pdu.data_digest);
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CU_ASSERT(iovs[1].iov_len == SPDK_NVME_TCP_DIGEST_LEN);
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CU_ASSERT(mapped_length == 4096 * 2 + SPDK_NVME_TCP_DIGEST_LEN);
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pdu.writev_offset += 4096 * 2;
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rc = nvme_tcp_build_iovs(iovs, 6, &pdu, true, true, &mapped_length);
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CU_ASSERT(rc == 1);
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CU_ASSERT(iovs[0].iov_base == (void *)pdu.data_digest);
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CU_ASSERT(iovs[0].iov_len == SPDK_NVME_TCP_DIGEST_LEN);
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CU_ASSERT(mapped_length == SPDK_NVME_TCP_DIGEST_LEN);
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pdu.writev_offset += SPDK_NVME_TCP_DIGEST_LEN;
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rc = nvme_tcp_build_iovs(iovs, 6, &pdu, true, true, &mapped_length);
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CU_ASSERT(rc == 0);
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pdu.writev_offset = 0;
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rc = nvme_tcp_build_iovs(iovs, 2, &pdu, true, true, &mapped_length);
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CU_ASSERT(rc == 2);
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CU_ASSERT(iovs[0].iov_base == (void *)&pdu.hdr.raw);
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CU_ASSERT(iovs[0].iov_len == sizeof(struct spdk_nvme_tcp_cmd) + SPDK_NVME_TCP_DIGEST_LEN);
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CU_ASSERT(iovs[1].iov_base == (void *)0xDEADBEEF);
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CU_ASSERT(iovs[1].iov_len == 4096 * 2);
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}
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int main(int argc, char **argv)
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{
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CU_pSuite suite = NULL;
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unsigned int num_failures;
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if (CU_initialize_registry() != CUE_SUCCESS) {
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return CU_get_error();
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}
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suite = CU_add_suite("nvme_tcp", NULL, NULL);
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if (suite == NULL) {
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CU_cleanup_registry();
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return CU_get_error();
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}
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if (CU_add_test(suite, "nvme_tcp_pdu_set_data_buf",
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test_nvme_tcp_pdu_set_data_buf) == NULL ||
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CU_add_test(suite, "nvme_tcp_build_iovs",
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test_nvme_tcp_build_iovs) == NULL
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) {
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CU_cleanup_registry();
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return CU_get_error();
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}
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CU_basic_set_mode(CU_BRM_VERBOSE);
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CU_basic_run_tests();
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num_failures = CU_get_number_of_failures();
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CU_cleanup_registry();
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return num_failures;
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}
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