8b6c22b1a0
DIF and DIX will be supported in SPDK throughout, e.g., NVMe driver, NVMe-oF initiator and target, NVMe block device, malloc block device, SCSI, iSCSI target, FIO plugin, and Perf. Generic and common APIs to generate and verify DIF and inject bit flip error to any field will be helpful for them. This patch is the first in the patch series. This patch adds APIs to generate and verify DIF for SGL extended LBA payload as byte alignement and granularity. Change-Id: Ie6588d960113761f10efbf2d2a3cae004af37ce8 Signed-off-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com> Reviewed-on: https://review.gerrithub.io/432261 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Changpeng Liu <changpeng.liu@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Chandler-Test-Pool: SPDK Automated Test System <sys_sgsw@intel.com>
614 lines
16 KiB
C
614 lines
16 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright (c) Intel Corporation.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "spdk/stdinc.h"
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#include "spdk_cunit.h"
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#include "util/dif.c"
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#define DATA_PATTERN 0xAB
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static int
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ut_data_pattern_generate(struct iovec *iovs, int iovcnt,
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uint32_t block_size, uint32_t md_size, uint32_t num_blocks)
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{
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uint32_t offset_blocks, offset_in_block, iov_offset, buf_len;
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int iovpos;
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void *buf;
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if (!_are_iovs_valid(iovs, iovcnt, block_size * num_blocks)) {
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return -1;
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}
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offset_blocks = 0;
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iov_offset = 0;
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iovpos = 0;
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while (offset_blocks < num_blocks && iovpos < iovcnt) {
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offset_in_block = 0;
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while (offset_in_block < block_size && iovpos < iovcnt) {
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buf = iovs[iovpos].iov_base + iov_offset;
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buf_len = iovs[iovpos].iov_len - iov_offset;
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if (offset_in_block < block_size - md_size) {
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buf_len = spdk_min(buf_len,
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block_size - md_size - offset_in_block);
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memset(buf, DATA_PATTERN, buf_len);
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} else {
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buf_len = spdk_min(buf_len, block_size - offset_in_block);
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memset(buf, 0, buf_len);
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}
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iov_offset += buf_len;
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if (iov_offset == iovs[iovpos].iov_len) {
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iovpos++;
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iov_offset = 0;
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}
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offset_in_block += buf_len;
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}
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offset_blocks++;
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}
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return 0;
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}
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static int
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ut_data_pattern_verify(struct iovec *iovs, int iovcnt,
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uint32_t block_size, uint32_t md_size, uint32_t num_blocks)
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{
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uint32_t offset_blocks, offset_in_block, iov_offset, buf_len, i;
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int iovpos;
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uint8_t *buf;
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if (!_are_iovs_valid(iovs, iovcnt, block_size * num_blocks)) {
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return -1;
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}
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offset_blocks = 0;
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iov_offset = 0;
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iovpos = 0;
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while (offset_blocks < num_blocks && iovpos < iovcnt) {
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offset_in_block = 0;
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while (offset_in_block < block_size && iovpos < iovcnt) {
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buf = iovs[iovpos].iov_base + iov_offset;
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buf_len = iovs[iovpos].iov_len - iov_offset;
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if (offset_in_block < block_size - md_size) {
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buf_len = spdk_min(buf_len,
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block_size - md_size - offset_in_block);
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for (i = 0; i < buf_len; i++) {
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if (buf[i] != DATA_PATTERN) {
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return -1;
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}
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}
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} else {
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buf_len = spdk_min(buf_len, block_size - offset_in_block);
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}
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iov_offset += buf_len;
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if (iov_offset == iovs[iovpos].iov_len) {
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iovpos++;
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iov_offset = 0;
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}
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offset_in_block += buf_len;
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}
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offset_blocks++;
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}
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return 0;
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}
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static void
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_iov_alloc_buf(struct iovec *iov, uint32_t len)
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{
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iov->iov_base = calloc(1, len);
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iov->iov_len = len;
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SPDK_CU_ASSERT_FATAL(iov->iov_base != NULL);
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}
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static void
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_iov_free_buf(struct iovec *iov)
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{
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free(iov->iov_base);
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}
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static void
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_dif_generate_and_verify(struct iovec *iov,
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uint32_t block_size, uint32_t md_size, uint32_t guard_interval,
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enum spdk_dif_type dif_type, uint32_t dif_flags,
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uint32_t ref_tag, uint32_t e_ref_tag,
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uint16_t app_tag, uint16_t apptag_mask, uint16_t e_app_tag,
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bool expect_pass)
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{
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int rc;
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uint16_t guard = 0;
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rc = ut_data_pattern_generate(iov, 1, block_size, md_size, 1);
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CU_ASSERT(rc == 0);
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if (dif_flags & SPDK_DIF_GUARD_CHECK) {
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guard = spdk_crc16_t10dif(0, iov->iov_base, guard_interval);
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}
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_dif_generate(iov->iov_base + guard_interval, dif_flags, guard, ref_tag, app_tag);
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rc = _dif_verify(iov->iov_base + guard_interval, dif_type, dif_flags,
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guard, e_ref_tag, apptag_mask, e_app_tag);
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CU_ASSERT((expect_pass && rc == 0) || (!expect_pass && rc != 0));
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rc = ut_data_pattern_verify(iov, 1, block_size, md_size, 1);
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CU_ASSERT(rc == 0);
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}
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static void
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dif_generate_and_verify_test(void)
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{
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struct iovec iov;
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uint32_t dif_flags;
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dif_flags = SPDK_DIF_GUARD_CHECK | SPDK_DIF_APPTAG_CHECK | SPDK_DIF_REFTAG_CHECK;
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_iov_alloc_buf(&iov, 4096 + 128);
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/* Positive cases */
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/* The case that DIF is contained in the first 8 bytes of metadata. */
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_dif_generate_and_verify(&iov,
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4096 + 128, 128, 4096,
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SPDK_DIF_TYPE1, dif_flags,
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22, 22,
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0x22, 0xFFFF, 0x22,
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true);
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/* The case that DIF is contained in the last 8 bytes of metadata. */
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_dif_generate_and_verify(&iov,
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4096 + 128, 128, 4096 + 128 - 8,
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SPDK_DIF_TYPE1, dif_flags,
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22, 22,
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0x22, 0xFFFF, 0x22,
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true);
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/* Negative cases */
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/* Reference tag doesn't match. */
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_dif_generate_and_verify(&iov,
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4096 + 128, 128, 4096,
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SPDK_DIF_TYPE1, dif_flags,
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22, 23,
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0x22, 0xFFFF, 0x22,
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false);
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/* Application tag doesn't match. */
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_dif_generate_and_verify(&iov,
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4096 + 128, 128, 4096,
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SPDK_DIF_TYPE1, dif_flags,
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22, 22,
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0x22, 0xFFFF, 0x23,
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false);
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_iov_free_buf(&iov);
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}
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static void
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dif_disable_check_test(void)
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{
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struct iovec iov;
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uint32_t dif_flags;
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dif_flags = SPDK_DIF_GUARD_CHECK | SPDK_DIF_APPTAG_CHECK | SPDK_DIF_REFTAG_CHECK;
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_iov_alloc_buf(&iov, 4096 + 128);
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/* The case that DIF check is disabled when the Application Tag is 0xFFFF for
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* Type 1. DIF check is disabled and pass is expected.
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*/
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_dif_generate_and_verify(&iov,
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4096 + 128, 128, 4096,
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SPDK_DIF_TYPE1, dif_flags,
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22, 22,
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0xFFFF, 0xFFFF, 0x22,
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true);
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/* The case that DIF check is not disabled when the Application Tag is 0xFFFF but
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* the Reference Tag is not 0xFFFFFFFF for Type 3. DIF check is not disabled and
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* fail is expected.
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*/
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_dif_generate_and_verify(&iov,
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4096 + 128, 128, 4096,
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SPDK_DIF_TYPE3, dif_flags,
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22, 22,
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0xFFFF, 0xFFFF, 0x22,
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false);
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/* The case that DIF check is disabled when the Application Tag is 0xFFFF and
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* the Reference Tag is 0xFFFFFFFF for Type 3. DIF check is disabled and
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* pass is expected.
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*/
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_dif_generate_and_verify(&iov,
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4096 + 128, 128, 4096,
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SPDK_DIF_TYPE3, dif_flags,
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0xFFFFFFFF, 22,
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0xFFFF, 0xFFFF, 0x22,
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true);
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_iov_free_buf(&iov);
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}
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static void
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dif_sec_512_md_0_error_test(void)
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{
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struct iovec iov = {};
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int rc;
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/* Metadata size is 0. */
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rc = spdk_dif_generate(&iov, 1, 512, 0, 1, false, SPDK_DIF_TYPE1, 0, 0, 0);
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CU_ASSERT(rc != 0);
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rc = spdk_dif_verify(&iov, 1, 512, 0, 1, false, SPDK_DIF_TYPE1, 0, 0, 0, 0);
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CU_ASSERT(rc != 0);
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}
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static void
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dif_generate_and_verify(struct iovec *iovs, int iovcnt,
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uint32_t block_size, uint32_t md_size, uint32_t num_blocks,
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bool dif_loc, enum spdk_dif_type dif_type, uint32_t dif_flags,
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uint32_t init_ref_tag, uint16_t apptag_mask, uint16_t app_tag)
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{
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int rc;
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rc = ut_data_pattern_generate(iovs, iovcnt, block_size, md_size, num_blocks);
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CU_ASSERT(rc == 0);
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rc = spdk_dif_generate(iovs, iovcnt, block_size, md_size, num_blocks,
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dif_loc, dif_type, dif_flags,
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init_ref_tag, app_tag);
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CU_ASSERT(rc == 0);
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rc = spdk_dif_verify(iovs, iovcnt, block_size, md_size, num_blocks,
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dif_loc, dif_type, dif_flags,
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init_ref_tag, apptag_mask, app_tag);
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CU_ASSERT(rc == 0);
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rc = ut_data_pattern_verify(iovs, iovcnt, block_size, md_size, num_blocks);
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CU_ASSERT(rc == 0);
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}
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static void
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dif_sec_512_md_8_prchk_0_single_iov_test(void)
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{
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struct iovec iov;
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_iov_alloc_buf(&iov, (512 + 8) * 4);
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dif_generate_and_verify(&iov, 1, 512 + 8, 8, 1, false, SPDK_DIF_TYPE1, 0, 0, 0, 0);
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_iov_free_buf(&iov);
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}
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static void
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dif_sec_512_md_8_prchk_0_1_2_4_multi_iovs_test(void)
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{
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struct iovec iovs[4];
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int i, num_blocks;
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num_blocks = 0;
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for (i = 0; i < 4; i++) {
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_iov_alloc_buf(&iovs[i], (512 + 8) * (i + 1));
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num_blocks += i + 1;
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}
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dif_generate_and_verify(iovs, 4, 512 + 8, 8, num_blocks, false, SPDK_DIF_TYPE1,
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0, 22, 0xFFFF, 0x22);
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dif_generate_and_verify(iovs, 4, 512 + 8, 8, num_blocks, false, SPDK_DIF_TYPE1,
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SPDK_DIF_GUARD_CHECK, 22, 0xFFFF, 0x22);
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dif_generate_and_verify(iovs, 4, 512 + 8, 8, num_blocks, false, SPDK_DIF_TYPE1,
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SPDK_DIF_APPTAG_CHECK, 22, 0xFFFF, 0x22);
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dif_generate_and_verify(iovs, 4, 512 + 8, 8, num_blocks, false, SPDK_DIF_TYPE1,
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SPDK_DIF_REFTAG_CHECK, 22, 0xFFFF, 0x22);
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for (i = 0; i < 4; i++) {
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_iov_free_buf(&iovs[i]);
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}
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}
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static void
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dif_sec_4096_md_128_prchk_7_multi_iovs_test(void)
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{
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struct iovec iovs[4];
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int i, num_blocks;
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uint32_t dif_flags;
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dif_flags = SPDK_DIF_GUARD_CHECK | SPDK_DIF_APPTAG_CHECK | SPDK_DIF_REFTAG_CHECK;
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num_blocks = 0;
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for (i = 0; i < 4; i++) {
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_iov_alloc_buf(&iovs[i], (4096 + 128) * (i + 1));
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num_blocks += i + 1;
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}
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dif_generate_and_verify(iovs, 4, 4096 + 128, 128, num_blocks, false, SPDK_DIF_TYPE1,
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dif_flags, 22, 0xFFFF, 0x22);
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dif_generate_and_verify(iovs, 4, 4096 + 128, 128, num_blocks, true, SPDK_DIF_TYPE1,
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dif_flags, 22, 0xFFFF, 0x22);
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for (i = 0; i < 4; i++) {
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_iov_free_buf(&iovs[i]);
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}
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}
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static void
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dif_sec_512_md_8_prchk_7_multi_iovs_split_data_and_md_test(void)
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{
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struct iovec iovs[2];
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uint32_t dif_flags;
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dif_flags = SPDK_DIF_GUARD_CHECK | SPDK_DIF_APPTAG_CHECK | SPDK_DIF_REFTAG_CHECK;
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_iov_alloc_buf(&iovs[0], 512);
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_iov_alloc_buf(&iovs[1], 8);
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dif_generate_and_verify(iovs, 2, 512 + 8, 8, 1, false, SPDK_DIF_TYPE1,
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dif_flags, 22, 0xFFFF, 0x22);
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_iov_free_buf(&iovs[0]);
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_iov_free_buf(&iovs[1]);
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}
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static void
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dif_sec_512_md_8_prchk_7_multi_iovs_split_data_test(void)
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{
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struct iovec iovs[2];
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uint32_t dif_flags;
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dif_flags = SPDK_DIF_GUARD_CHECK | SPDK_DIF_APPTAG_CHECK | SPDK_DIF_REFTAG_CHECK;
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_iov_alloc_buf(&iovs[0], 256);
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_iov_alloc_buf(&iovs[1], 264);
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dif_generate_and_verify(iovs, 2, 512 + 8, 8, 1, false, SPDK_DIF_TYPE1,
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dif_flags, 22, 0xFFFF, 0x22);
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_iov_free_buf(&iovs[0]);
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_iov_free_buf(&iovs[1]);
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}
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static void
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dif_sec_512_md_8_prchk_7_multi_iovs_split_guard_test(void)
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{
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struct iovec iovs[2];
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uint32_t dif_flags;
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dif_flags = SPDK_DIF_GUARD_CHECK | SPDK_DIF_APPTAG_CHECK | SPDK_DIF_REFTAG_CHECK;
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_iov_alloc_buf(&iovs[0], 513);
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_iov_alloc_buf(&iovs[1], 7);
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dif_generate_and_verify(iovs, 2, 512 + 8, 8, 1, false, SPDK_DIF_TYPE1,
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dif_flags, 22, 0xFFFF, 0x22);
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_iov_free_buf(&iovs[0]);
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_iov_free_buf(&iovs[1]);
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}
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static void
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dif_sec_512_md_8_prchk_7_multi_iovs_split_apptag_test(void)
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{
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struct iovec iovs[2];
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uint32_t dif_flags;
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dif_flags = SPDK_DIF_GUARD_CHECK | SPDK_DIF_APPTAG_CHECK | SPDK_DIF_REFTAG_CHECK;
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_iov_alloc_buf(&iovs[0], 515);
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_iov_alloc_buf(&iovs[1], 5);
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dif_generate_and_verify(iovs, 2, 512 + 8, 8, 1, false, SPDK_DIF_TYPE1,
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dif_flags, 22, 0xFFFF, 0x22);
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_iov_free_buf(&iovs[0]);
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_iov_free_buf(&iovs[1]);
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}
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static void
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dif_sec_512_md_8_prchk_7_multi_iovs_split_reftag_test(void)
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{
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struct iovec iovs[2];
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uint32_t dif_flags;
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dif_flags = SPDK_DIF_GUARD_CHECK | SPDK_DIF_APPTAG_CHECK | SPDK_DIF_REFTAG_CHECK;
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_iov_alloc_buf(&iovs[0], 518);
|
|
_iov_alloc_buf(&iovs[1], 2);
|
|
|
|
dif_generate_and_verify(iovs, 2, 512 + 8, 8, 1, false, SPDK_DIF_TYPE1,
|
|
dif_flags, 22, 0xFFFF, 0x22);
|
|
|
|
_iov_free_buf(&iovs[0]);
|
|
_iov_free_buf(&iovs[1]);
|
|
}
|
|
|
|
static void
|
|
dif_sec_512_md_8_prchk_7_multi_iovs_complex_splits_test(void)
|
|
{
|
|
struct iovec iovs[9];
|
|
uint32_t dif_flags;
|
|
int i;
|
|
|
|
dif_flags = SPDK_DIF_GUARD_CHECK | SPDK_DIF_APPTAG_CHECK | SPDK_DIF_REFTAG_CHECK;
|
|
|
|
/* data[0][255:0] */
|
|
_iov_alloc_buf(&iovs[0], 256);
|
|
|
|
/* data[0][511:256], guard[0][0] */
|
|
_iov_alloc_buf(&iovs[1], 256 + 1);
|
|
|
|
/* guard[0][1], apptag[0][0] */
|
|
_iov_alloc_buf(&iovs[2], 1 + 1);
|
|
|
|
/* apptag[0][1], reftag[0][0] */
|
|
_iov_alloc_buf(&iovs[3], 1 + 1);
|
|
|
|
/* reftag[0][3:1], data[1][255:0] */
|
|
_iov_alloc_buf(&iovs[4], 3 + 256);
|
|
|
|
/* data[1][511:256], guard[1][0] */
|
|
_iov_alloc_buf(&iovs[5], 256 + 1);
|
|
|
|
/* guard[1][1], apptag[1][0] */
|
|
_iov_alloc_buf(&iovs[6], 1 + 1);
|
|
|
|
/* apptag[1][1], reftag[1][0] */
|
|
_iov_alloc_buf(&iovs[7], 1 + 1);
|
|
|
|
/* reftag[1][3:1] */
|
|
_iov_alloc_buf(&iovs[8], 3);
|
|
|
|
dif_generate_and_verify(iovs, 9, 512 + 8, 8, 2, false, SPDK_DIF_TYPE1, dif_flags,
|
|
22, 0xFFFF, 0x22);
|
|
|
|
for (i = 0; i < 9; i++) {
|
|
_iov_free_buf(&iovs[i]);
|
|
}
|
|
}
|
|
|
|
static void
|
|
dif_sec_4096_md_128_prchk_7_multi_iovs_complex_splits_test(void)
|
|
{
|
|
struct iovec iovs[11];
|
|
uint32_t dif_flags;
|
|
int i;
|
|
|
|
dif_flags = SPDK_DIF_GUARD_CHECK | SPDK_DIF_APPTAG_CHECK | SPDK_DIF_REFTAG_CHECK;
|
|
|
|
/* data[0][1000:0] */
|
|
_iov_alloc_buf(&iovs[0], 1000);
|
|
|
|
/* data[0][3095:1000], guard[0][0] */
|
|
_iov_alloc_buf(&iovs[1], 3096 + 1);
|
|
|
|
/* guard[0][1], apptag[0][0] */
|
|
_iov_alloc_buf(&iovs[2], 1 + 1);
|
|
|
|
/* apptag[0][1], reftag[0][0] */
|
|
_iov_alloc_buf(&iovs[3], 1 + 1);
|
|
|
|
/* reftag[0][3:1], ignore[0][59:0] */
|
|
_iov_alloc_buf(&iovs[4], 3 + 60);
|
|
|
|
/* ignore[119:60], data[1][3050:0] */
|
|
_iov_alloc_buf(&iovs[5], 60 + 3051);
|
|
|
|
/* data[1][4095:3050], guard[1][0] */
|
|
_iov_alloc_buf(&iovs[6], 1045 + 1);
|
|
|
|
/* guard[1][1], apptag[1][0] */
|
|
_iov_alloc_buf(&iovs[7], 1 + 1);
|
|
|
|
/* apptag[1][1], reftag[1][0] */
|
|
_iov_alloc_buf(&iovs[8], 1 + 1);
|
|
|
|
/* reftag[1][3:1], ignore[1][9:0] */
|
|
_iov_alloc_buf(&iovs[9], 3 + 10);
|
|
|
|
/* ignore[1][127:9] */
|
|
_iov_alloc_buf(&iovs[10], 118);
|
|
|
|
dif_generate_and_verify(iovs, 11, 4096 + 128, 128, 2, false, SPDK_DIF_TYPE1, dif_flags,
|
|
22, 0xFFFF, 0x22);
|
|
dif_generate_and_verify(iovs, 11, 4096 + 128, 128, 2, true, SPDK_DIF_TYPE1, dif_flags,
|
|
22, 0xFFFF, 0x22);
|
|
|
|
for (i = 0; i < 11; i++) {
|
|
_iov_free_buf(&iovs[i]);
|
|
}
|
|
}
|
|
|
|
int
|
|
main(int argc, char **argv)
|
|
{
|
|
CU_pSuite suite = NULL;
|
|
unsigned int num_failures;
|
|
|
|
if (CU_initialize_registry() != CUE_SUCCESS) {
|
|
return CU_get_error();
|
|
}
|
|
|
|
suite = CU_add_suite("dif", NULL, NULL);
|
|
if (suite == NULL) {
|
|
CU_cleanup_registry();
|
|
return CU_get_error();
|
|
}
|
|
|
|
if (
|
|
CU_add_test(suite, "dif_generate_and_verify_test", dif_generate_and_verify_test) == NULL ||
|
|
CU_add_test(suite, "dif_disable_check_test", dif_disable_check_test) == NULL ||
|
|
CU_add_test(suite, "dif_sec_512_md_0_error_test", dif_sec_512_md_0_error_test) == NULL ||
|
|
CU_add_test(suite, "dif_sec_512_md_8_prchk_0_single_iov_test",
|
|
dif_sec_512_md_8_prchk_0_single_iov_test) == NULL ||
|
|
CU_add_test(suite, "dif_sec_512_md_8_prchk_0_1_2_4_multi_iovs_test",
|
|
dif_sec_512_md_8_prchk_0_1_2_4_multi_iovs_test) == NULL ||
|
|
CU_add_test(suite, "dif_sec_4096_md_128_prchk_7_multi_iovs_test",
|
|
dif_sec_4096_md_128_prchk_7_multi_iovs_test) == NULL ||
|
|
CU_add_test(suite, "dif_sec_512_md_8_prchk_7_multi_iovs_split_data_and_md_test",
|
|
dif_sec_512_md_8_prchk_7_multi_iovs_split_data_and_md_test) == NULL ||
|
|
CU_add_test(suite, "dif_sec_512_md_8_prchk_7_multi_iovs_split_data_test",
|
|
dif_sec_512_md_8_prchk_7_multi_iovs_split_data_test) == NULL ||
|
|
CU_add_test(suite, "dif_sec_512_md_8_prchk_7_multi_iovs_split_guard_test",
|
|
dif_sec_512_md_8_prchk_7_multi_iovs_split_guard_test) == NULL ||
|
|
CU_add_test(suite, "dif_sec_512_md_8_prchk_7_multi_iovs_split_apptag_test",
|
|
dif_sec_512_md_8_prchk_7_multi_iovs_split_apptag_test) == NULL ||
|
|
CU_add_test(suite, "dif_sec_512_md_8_prchk_7_multi_iovs_split_reftag_test",
|
|
dif_sec_512_md_8_prchk_7_multi_iovs_split_reftag_test) == NULL ||
|
|
CU_add_test(suite, "dif_sec_512_md_8_prchk_7_multi_iovs_complex_splits_test",
|
|
dif_sec_512_md_8_prchk_7_multi_iovs_complex_splits_test) == NULL ||
|
|
CU_add_test(suite, "dif_sec_4096_md_128_prchk_7_multi_iovs_complex_splits_test",
|
|
dif_sec_4096_md_128_prchk_7_multi_iovs_complex_splits_test) == NULL
|
|
) {
|
|
CU_cleanup_registry();
|
|
return CU_get_error();
|
|
}
|
|
|
|
CU_basic_set_mode(CU_BRM_VERBOSE);
|
|
|
|
CU_basic_run_tests();
|
|
|
|
num_failures = CU_get_number_of_failures();
|
|
CU_cleanup_registry();
|
|
|
|
return num_failures;
|
|
}
|