51606ed402
Initial support for softare AESNI_MB DPDK driver only. Have tested (both aesni and QAT seprately and concurrrently) on underlying NVMe devices with bdevio and a bdevperf script that runs IOs from 512B to 128K each with Q depths from 1 to 512 in powers of 2 for 30 seconds each run. QAT can be included in the code (but not makefile) and marked as experimental until we are ready to test in CI. It works well on 2 systems but is a big PITA to get the hardware setup and configured for use with DPDK (IMHO). Change-Id: If518c3df8e74e00efa18afdf194824c5e69778fc Signed-off-by: Paul Luse <paul.e.luse@intel.com> Reviewed-on: https://review.gerrithub.io/403107 Chandler-Test-Pool: SPDK Automated Test System <sys_sgsw@intel.com> Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com>
148 lines
4.3 KiB
C
148 lines
4.3 KiB
C
/*-
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*
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* Copyright(c) 2015-2017 Intel Corporation. All rights reserved.
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* Copyright 2014 6WIND S.A.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _RTE_CRYPTODEV_H_
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#define _RTE_CRYPTODEV_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* In order to mock some DPDK functions, we place headers here with the name name as the DPDK headers
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* so these definitions wil be picked up. Only what's mocked is included.
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*/
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uint8_t dummy[16];
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#define rte_crypto_op_ctod_offset(c, t, o) &dummy[0]
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#define RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER (1ULL << 9)
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struct rte_cryptodev_info {
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const char *driver_name;
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uint8_t driver_id;
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struct rte_pci_device *pci_dev;
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uint64_t feature_flags;
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const struct rte_cryptodev_capabilities *capabilities;
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unsigned max_nb_queue_pairs;
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struct {
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unsigned max_nb_sessions;
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unsigned int max_nb_sessions_per_qp;
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} sym;
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};
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enum rte_cryptodev_event_type {
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RTE_CRYPTODEV_EVENT_UNKNOWN,
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RTE_CRYPTODEV_EVENT_ERROR,
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RTE_CRYPTODEV_EVENT_MAX
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};
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struct rte_cryptodev_qp_conf {
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uint32_t nb_descriptors;
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};
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struct rte_cryptodev_stats {
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uint64_t enqueued_count;
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uint64_t dequeued_count;
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uint64_t enqueue_err_count;
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uint64_t dequeue_err_count;
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};
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#define RTE_CRYPTODEV_NAME_MAX_LEN (64)
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extern uint8_t
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rte_cryptodev_count(void);
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extern uint8_t
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rte_cryptodev_device_count_by_driver(uint8_t driver_id);
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extern int
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rte_cryptodev_socket_id(uint8_t dev_id);
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struct rte_cryptodev_config {
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int socket_id;
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uint16_t nb_queue_pairs;
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};
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extern int
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rte_cryptodev_configure(uint8_t dev_id, struct rte_cryptodev_config *config);
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extern int
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rte_cryptodev_start(uint8_t dev_id);
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extern void
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rte_cryptodev_stop(uint8_t dev_id);
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extern int
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rte_cryptodev_queue_pair_setup(uint8_t dev_id, uint16_t queue_pair_id,
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const struct rte_cryptodev_qp_conf *qp_conf, int socket_id,
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struct rte_mempool *session_pool);
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extern void
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rte_cryptodev_info_get(uint8_t dev_id, struct rte_cryptodev_info *dev_info);
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static inline uint16_t
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rte_cryptodev_dequeue_burst(uint8_t dev_id, uint16_t qp_id,
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struct rte_crypto_op **ops, uint16_t nb_ops);
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static inline uint16_t
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rte_cryptodev_enqueue_burst(uint8_t dev_id, uint16_t qp_id,
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struct rte_crypto_op **ops, uint16_t nb_ops);
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struct rte_cryptodev_sym_session {
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__extension__ void *sess_private_data[0];
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};
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struct rte_cryptodev_sym_session *
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rte_cryptodev_sym_session_create(struct rte_mempool *mempool);
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int
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rte_cryptodev_sym_session_free(struct rte_cryptodev_sym_session *sess);
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int
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rte_cryptodev_sym_session_init(uint8_t dev_id,
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struct rte_cryptodev_sym_session *sess,
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struct rte_crypto_sym_xform *xforms,
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struct rte_mempool *mempool);
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int
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rte_cryptodev_sym_session_clear(uint8_t dev_id,
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struct rte_cryptodev_sym_session *sess);
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unsigned int
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rte_cryptodev_sym_get_private_session_size(uint8_t dev_id);
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#ifdef __cplusplus
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}
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#endif
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#endif
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