barrier.h: change PPC64 spdk_rmb from lwsync to sync

Suggested-by: Jonas Pfefferle
Signed-off-by: Jim Harris <james.r.harris@intel.com>
Change-Id: I33cf41d39a4546fbb5f44fccc1380c731d0224af

Reviewed-on: https://review.gerrithub.io/413705
Tested-by: SPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: Jonas Pfefferle <pepperjo@japf.ch>
Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com>
This commit is contained in:
Jim Harris 2018-06-04 10:12:08 -07:00
parent fba68d61e1
commit f32b3ea9f4

View File

@ -62,7 +62,7 @@ extern "C" {
/** Read memory barrier */ /** Read memory barrier */
#ifdef __PPC64__ #ifdef __PPC64__
#define spdk_rmb() __asm volatile("lwsync" ::: "memory") #define spdk_rmb() __asm volatile("sync" ::: "memory")
#elif defined(__aarch64__) #elif defined(__aarch64__)
#define spdk_rmb() __asm volatile("dsb lt" ::: "memory") #define spdk_rmb() __asm volatile("dsb lt" ::: "memory")
#elif defined(__i386__) || defined(__x86_64__) #elif defined(__i386__) || defined(__x86_64__)