From e2256173a8f4360c67016704bdcb869001c07433 Mon Sep 17 00:00:00 2001 From: Daniel Verkamp Date: Wed, 6 Jul 2016 15:21:48 -0700 Subject: [PATCH] nvme/identify: dump CAP and VS registers Change-Id: I157dc7f1eda082f1bdf0a176fc6c6061291e2ac1 Signed-off-by: Daniel Verkamp --- examples/nvme/identify/identify.c | 47 +++++++++++++++++++++++++------ include/spdk/nvme_spec.h | 3 +- 2 files changed, 40 insertions(+), 10 deletions(-) diff --git a/examples/nvme/identify/identify.c b/examples/nvme/identify/identify.c index 80f8c6120..1e500eb38 100644 --- a/examples/nvme/identify/identify.c +++ b/examples/nvme/identify/identify.c @@ -444,10 +444,15 @@ static void print_controller(struct spdk_nvme_ctrlr *ctrlr, struct spdk_pci_device *pci_dev) { const struct spdk_nvme_ctrlr_data *cdata; + union spdk_nvme_cap_register cap; + union spdk_nvme_vs_register vs; uint8_t str[512]; uint32_t i; struct spdk_nvme_error_information_entry *error_entry; + cap = spdk_nvme_ctrlr_get_regs_cap(ctrlr); + vs = spdk_nvme_ctrlr_get_regs_vs(ctrlr); + get_features(ctrlr); get_log_pages(ctrlr); @@ -466,20 +471,20 @@ print_controller(struct spdk_nvme_ctrlr *ctrlr, struct spdk_pci_device *pci_dev) printf("Controller Capabilities/Features\n"); printf("================================\n"); - printf("Vendor ID: %04x\n", cdata->vid); - printf("Subsystem Vendor ID: %04x\n", cdata->ssvid); + printf("Vendor ID: %04x\n", cdata->vid); + printf("Subsystem Vendor ID: %04x\n", cdata->ssvid); snprintf(str, sizeof(cdata->sn) + 1, "%s", cdata->sn); - printf("Serial Number: %s\n", str); + printf("Serial Number: %s\n", str); snprintf(str, sizeof(cdata->mn) + 1, "%s", cdata->mn); - printf("Model Number: %s\n", str); + printf("Model Number: %s\n", str); snprintf(str, sizeof(cdata->fr) + 1, "%s", cdata->fr); - printf("Firmware Version: %s\n", str); - printf("Recommended Arb Burst: %d\n", cdata->rab); - printf("IEEE OUI Identifier: %02x %02x %02x\n", + printf("Firmware Version: %s\n", str); + printf("Recommended Arb Burst: %d\n", cdata->rab); + printf("IEEE OUI Identifier: %02x %02x %02x\n", cdata->ieee[0], cdata->ieee[1], cdata->ieee[2]); - printf("Multi-path I/O: %02x\n", *(int *)&cdata->cmic); + printf("Multi-path I/O: %02x\n", *(int *)&cdata->cmic); /* TODO: Use CAP.MPSMIN to determine true memory page size. */ - printf("Max Data Transfer Size: "); + printf("Max Data Transfer Size: "); if (cdata->mdts == 0) printf("Unlimited\n"); else @@ -493,6 +498,30 @@ print_controller(struct spdk_nvme_ctrlr *ctrlr, struct spdk_pci_device *pci_dev) printf("%u milliseconds\n", tler * 100); } } + printf("NVMe Specification Version: %u.%u", vs.bits.mjr, vs.bits.mnr); + if (vs.bits.ter) { + printf(".%u", vs.bits.ter); + } + printf("\n"); + printf("Maximum Queue Entries: %u\n", cap.bits.mqes + 1); + printf("Contiguous Queues Required: %s\n", cap.bits.cqr ? "Yes" : "No"); + printf("Arbitration Mechanisms Supported\n"); + printf(" Weighted Round Robin: %s\n", + cap.bits.ams & SPDK_NVME_CAP_AMS_WRR ? "Supported" : "Not Supported"); + printf(" Vendor Specific: %s\n", + cap.bits.ams & SPDK_NVME_CAP_AMS_VS ? "Supported" : "Not Supported"); + printf("Reset Timeout: %" PRIu64 " ms\n", (uint64_t)500 * cap.bits.to); + printf("Doorbell Stride: %" PRIu64 " bytes\n", + (uint64_t)1 << (2 + cap.bits.dstrd)); + printf("NVM Subsystem Reset: %s\n", + cap.bits.nssrs ? "Supported" : "Not Supported"); + printf("Command Sets Supported\n"); + printf(" NVM Command Set: %s\n", + cap.bits.css_nvm ? "Supported" : "Not Supported"); + printf("Memory Page Size Minimum: %" PRIu64 " bytes\n", + (uint64_t)1 << (12 + cap.bits.mpsmin)); + printf("Memory Page Size Maximum: %" PRIu64 " bytes\n", + (uint64_t)1 << (12 + cap.bits.mpsmax)); printf("\n"); printf("Admin Command Set Attributes\n"); diff --git a/include/spdk/nvme_spec.h b/include/spdk/nvme_spec.h index 391a007f1..19e5ef70d 100644 --- a/include/spdk/nvme_spec.h +++ b/include/spdk/nvme_spec.h @@ -186,7 +186,8 @@ SPDK_STATIC_ASSERT(sizeof(union spdk_nvme_aqa_register) == 4, "Incorrect size"); union spdk_nvme_vs_register { uint32_t raw; struct { - uint32_t reserved1 : 8; + /** indicates the tertiary version */ + uint32_t ter : 8; /** indicates the minor version */ uint32_t mnr : 8; /** indicates the major version */