diff --git a/lib/nvme/nvme_internal.h b/lib/nvme/nvme_internal.h
index d745d084a..162668002 100644
--- a/lib/nvme/nvme_internal.h
+++ b/lib/nvme/nvme_internal.h
@@ -150,6 +150,12 @@ extern pid_t g_spdk_nvme_pid;
  */
 #define NVME_QUIRK_OACS_SECURITY 0x2000
 
+/**
+ * Intel P55XX SSDs can't support Dataset Management command with SGL format,
+ * so use PRP with DSM command.
+ */
+#define NVME_QUIRK_NO_SGL_FOR_DSM 0x4000
+
 #define NVME_MAX_ASYNC_EVENTS	(8)
 
 #define NVME_MAX_ADMIN_TIMEOUT_IN_SECS	(30)
diff --git a/lib/nvme/nvme_pcie.c b/lib/nvme/nvme_pcie.c
index ff5daa46c..098fc64b2 100644
--- a/lib/nvme/nvme_pcie.c
+++ b/lib/nvme/nvme_pcie.c
@@ -1663,6 +1663,14 @@ nvme_pcie_qpair_submit_request(struct spdk_nvme_qpair *qpair, struct nvme_reques
 		sgl_supported = (ctrlr->flags & SPDK_NVME_CTRLR_SGL_SUPPORTED) != 0 &&
 				!nvme_qpair_is_admin_queue(qpair);
 
+		if (sgl_supported) {
+			/* Don't use SGL for DSM command */
+			if (spdk_unlikely((ctrlr->quirks & NVME_QUIRK_NO_SGL_FOR_DSM) &&
+					  (req->cmd.opc == SPDK_NVME_OPC_DATASET_MANAGEMENT))) {
+				sgl_supported = false;
+			}
+		}
+
 		if (sgl_supported && !(ctrlr->flags & SPDK_NVME_CTRLR_SGL_REQUIRES_DWORD_ALIGNMENT)) {
 			dword_aligned = false;
 		}
diff --git a/lib/nvme/nvme_quirks.c b/lib/nvme/nvme_quirks.c
index 9f6cb3983..c499ae0b0 100644
--- a/lib/nvme/nvme_quirks.c
+++ b/lib/nvme/nvme_quirks.c
@@ -74,7 +74,8 @@ static const struct nvme_quirk nvme_quirks[] = {
 		NVME_INTEL_QUIRK_WRITE_LATENCY |
 		NVME_INTEL_QUIRK_STRIPING |
 		NVME_QUIRK_READ_ZERO_AFTER_DEALLOCATE |
-		NVME_QUIRK_MINIMUM_IO_QUEUE_SIZE
+		NVME_QUIRK_MINIMUM_IO_QUEUE_SIZE |
+		NVME_QUIRK_NO_SGL_FOR_DSM
 	},
 	{	{SPDK_PCI_CLASS_NVME, SPDK_PCI_VID_MEMBLAZE, 0x0540, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
 		NVME_QUIRK_DELAY_BEFORE_CHK_RDY