nvme: add the per process admin cpl queue for multi-process case
Change-Id: Ie67e3414db807160092bb10812a586b7230e0a89 Signed-off-by: GangCao <gang.cao@intel.com>
This commit is contained in:
parent
80f63aad73
commit
bfc8bc87fb
@ -107,6 +107,7 @@ nvme_allocate_request(const struct nvme_payload *payload, uint32_t payload_size,
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req->cb_arg = cb_arg;
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req->cb_arg = cb_arg;
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req->payload = *payload;
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req->payload = *payload;
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req->payload_size = payload_size;
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req->payload_size = payload_size;
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req->pid = getpid();
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return req;
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return req;
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}
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}
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@ -142,6 +143,7 @@ nvme_user_copy_cmd_complete(void *arg, const struct spdk_nvme_cpl *cpl)
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xfer = spdk_nvme_opc_get_data_transfer(req->cmd.opc);
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xfer = spdk_nvme_opc_get_data_transfer(req->cmd.opc);
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if (xfer == SPDK_NVME_DATA_CONTROLLER_TO_HOST ||
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if (xfer == SPDK_NVME_DATA_CONTROLLER_TO_HOST ||
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xfer == SPDK_NVME_DATA_BIDIRECTIONAL) {
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xfer == SPDK_NVME_DATA_BIDIRECTIONAL) {
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assert(req->pid == getpid());
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memcpy(req->user_buffer, req->payload.u.contig, req->payload_size);
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memcpy(req->user_buffer, req->payload.u.contig, req->payload_size);
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}
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}
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@ -800,6 +800,54 @@ nvme_ctrlr_configure_aer(struct spdk_nvme_ctrlr *ctrlr)
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return 0;
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return 0;
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}
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}
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/**
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* This function will be called when a new process is using the controller.
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* 1. For the primary process, it is called when constructing the controller.
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* 2. For the secondary process, it is called at probing the controller.
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*/
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int
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nvme_ctrlr_add_process(struct spdk_nvme_ctrlr *ctrlr, void *devhandle)
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{
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struct spdk_nvme_controller_process *ctrlr_proc;
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/* Initialize the per process properties for this ctrlr */
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ctrlr_proc = spdk_zmalloc(sizeof(struct spdk_nvme_controller_process), 64, NULL);
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if (ctrlr_proc == NULL) {
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SPDK_ERRLOG("failed to allocate memory to track the process props\n");
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return -1;
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}
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ctrlr_proc->is_primary = spdk_process_is_primary();
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ctrlr_proc->pid = getpid();
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STAILQ_INIT(&ctrlr_proc->active_reqs);
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ctrlr_proc->devhandle = devhandle;
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TAILQ_INSERT_TAIL(&ctrlr->active_procs, ctrlr_proc, tailq);
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return 0;
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}
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/**
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* This function will be called when destructing the controller.
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* 1. There is no more admin request on this controller.
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* 2. Clean up any left resource allocation when its associated process is gone.
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*/
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void
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nvme_ctrlr_free_processes(struct spdk_nvme_ctrlr *ctrlr)
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{
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struct spdk_nvme_controller_process *active_proc, *tmp;
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/* Free all the processes' properties and make sure no pending admin IOs */
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TAILQ_FOREACH_SAFE(active_proc, &ctrlr->active_procs, tailq, tmp) {
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TAILQ_REMOVE(&ctrlr->active_procs, active_proc, tailq);
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assert(STAILQ_EMPTY(&active_proc->active_reqs));
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spdk_free(active_proc);
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}
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}
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/**
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/**
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* This function will be called repeatedly during initialization until the controller is ready.
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* This function will be called repeatedly during initialization until the controller is ready.
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*/
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*/
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@ -984,7 +1032,9 @@ nvme_mutex_init_recursive_shared(pthread_mutex_t *mtx)
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return -1;
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return -1;
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}
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}
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if (pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_RECURSIVE) ||
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if (pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_RECURSIVE) ||
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#ifndef __FreeBSD__
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pthread_mutexattr_setpshared(&attr, PTHREAD_PROCESS_SHARED) ||
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pthread_mutexattr_setpshared(&attr, PTHREAD_PROCESS_SHARED) ||
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#endif
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pthread_mutex_init(mtx, &attr)) {
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pthread_mutex_init(mtx, &attr)) {
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rc = -1;
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rc = -1;
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}
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}
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@ -1014,6 +1064,8 @@ nvme_ctrlr_construct(struct spdk_nvme_ctrlr *ctrlr)
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ctrlr->quirks = nvme_get_quirks(&pci_id);
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ctrlr->quirks = nvme_get_quirks(&pci_id);
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}
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}
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TAILQ_INIT(&ctrlr->active_procs);
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return 0;
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return 0;
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}
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}
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@ -1035,6 +1087,8 @@ nvme_ctrlr_destruct(struct spdk_nvme_ctrlr *ctrlr)
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pthread_mutex_destroy(&ctrlr->ctrlr_lock);
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pthread_mutex_destroy(&ctrlr->ctrlr_lock);
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nvme_ctrlr_free_processes(ctrlr);
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ctrlr->transport->ctrlr_destruct(ctrlr);
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ctrlr->transport->ctrlr_destruct(ctrlr);
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}
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}
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@ -163,6 +163,16 @@ struct nvme_request {
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void *cb_arg;
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void *cb_arg;
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STAILQ_ENTRY(nvme_request) stailq;
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STAILQ_ENTRY(nvme_request) stailq;
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/**
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* The active admin request can be moved to a per process pending
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* list based on the saved pid to tell which process it belongs
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* to. The cpl saves the original completion information which
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* is used in the completion callback.
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* NOTE: these below two fields are only used for admin request.
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*/
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pid_t pid;
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struct spdk_nvme_cpl cpl;
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/**
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/**
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* The following members should not be reordered with members
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* The following members should not be reordered with members
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* above. These members are only needed when splitting
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* above. These members are only needed when splitting
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@ -313,6 +323,25 @@ enum nvme_ctrlr_state {
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#define NVME_TIMEOUT_INFINITE UINT64_MAX
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#define NVME_TIMEOUT_INFINITE UINT64_MAX
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/*
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* Used to track properties for all processes accessing the controller.
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*/
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struct spdk_nvme_controller_process {
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/** Whether it is the primary process */
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bool is_primary;
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/** Process ID */
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pid_t pid;
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/** Active admin requests to be completed */
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STAILQ_HEAD(, nvme_request) active_reqs;
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TAILQ_ENTRY(spdk_nvme_controller_process) tailq;
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/** Per process PCI device handle */
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struct spdk_pci_device *devhandle;
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};
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/*
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/*
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* One of these per allocated PCI device.
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* One of these per allocated PCI device.
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*/
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*/
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@ -395,6 +424,9 @@ struct spdk_nvme_ctrlr {
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/* Extra sleep time during controller initialization */
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/* Extra sleep time during controller initialization */
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uint64_t sleep_timeout_tsc;
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uint64_t sleep_timeout_tsc;
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/** Track all the processes manage this controller */
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TAILQ_HEAD(, spdk_nvme_controller_process) active_procs;
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};
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};
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struct nvme_driver {
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struct nvme_driver {
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@ -475,6 +507,9 @@ int nvme_ctrlr_cmd_fw_image_download(struct spdk_nvme_ctrlr *ctrlr,
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spdk_nvme_cmd_cb cb_fn, void *cb_arg);
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spdk_nvme_cmd_cb cb_fn, void *cb_arg);
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void nvme_completion_poll_cb(void *arg, const struct spdk_nvme_cpl *cpl);
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void nvme_completion_poll_cb(void *arg, const struct spdk_nvme_cpl *cpl);
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int nvme_ctrlr_add_process(struct spdk_nvme_ctrlr *ctrlr, void *devhandle);
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void nvme_ctrlr_free_processes(struct spdk_nvme_ctrlr *ctrlr);
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int nvme_ctrlr_construct(struct spdk_nvme_ctrlr *ctrlr);
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int nvme_ctrlr_construct(struct spdk_nvme_ctrlr *ctrlr);
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void nvme_ctrlr_destruct(struct spdk_nvme_ctrlr *ctrlr);
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void nvme_ctrlr_destruct(struct spdk_nvme_ctrlr *ctrlr);
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int nvme_ctrlr_process_init(struct spdk_nvme_ctrlr *ctrlr);
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int nvme_ctrlr_process_init(struct spdk_nvme_ctrlr *ctrlr);
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@ -489,6 +489,13 @@ static struct spdk_nvme_ctrlr *nvme_pcie_ctrlr_construct(void *devhandle)
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return NULL;
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return NULL;
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}
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}
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/* Construct the primary process properties */
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rc = nvme_ctrlr_add_process(&pctrlr->ctrlr, pci_dev);
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if (rc != 0) {
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nvme_ctrlr_destruct(&pctrlr->ctrlr);
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return NULL;
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}
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return &pctrlr->ctrlr;
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return &pctrlr->ctrlr;
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}
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}
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@ -678,6 +685,91 @@ nvme_pcie_copy_command(struct spdk_nvme_cmd *dst, const struct spdk_nvme_cmd *sr
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#endif
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#endif
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}
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}
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static void
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nvme_pcie_qpair_insert_pending_admin_request(struct spdk_nvme_qpair *qpair,
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struct nvme_request *req, struct spdk_nvme_cpl *cpl)
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{
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struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
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struct nvme_request *active_req = req;
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struct spdk_nvme_controller_process *active_proc, *tmp;
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bool pending_on_proc = false;
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/*
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* The admin request is from another process. Move to the per
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* process list for that process to handle it later.
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*/
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assert(nvme_qpair_is_admin_queue(qpair));
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assert(active_req->pid != getpid());
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/* Acquire the recursive lock first if not held already. */
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pthread_mutex_lock(&ctrlr->ctrlr_lock);
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TAILQ_FOREACH_SAFE(active_proc, &ctrlr->active_procs, tailq, tmp) {
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if (active_proc->pid == active_req->pid) {
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/* Saved the original completion information */
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memcpy(&active_req->cpl, cpl, sizeof(*cpl));
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STAILQ_INSERT_TAIL(&active_proc->active_reqs, active_req, stailq);
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pending_on_proc = true;
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break;
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}
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}
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pthread_mutex_unlock(&ctrlr->ctrlr_lock);
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if (pending_on_proc == false) {
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SPDK_ERRLOG("The owning process is not found. Drop the request.\n");
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nvme_free_request(active_req);
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}
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}
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static void
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nvme_pcie_qpair_complete_pending_admin_request(struct spdk_nvme_qpair *qpair)
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{
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struct spdk_nvme_ctrlr *ctrlr = qpair->ctrlr;
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struct nvme_request *req, *tmp_req;
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bool proc_found = false;
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pid_t pid = getpid();
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struct spdk_nvme_controller_process *proc;
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/*
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* Check whether there is any pending admin request from
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* other active processes.
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*/
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assert(nvme_qpair_is_admin_queue(qpair));
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/* Acquire the recursive lock if not held already */
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pthread_mutex_lock(&ctrlr->ctrlr_lock);
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TAILQ_FOREACH(proc, &ctrlr->active_procs, tailq) {
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if (proc->pid == pid) {
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proc_found = true;
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break;
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}
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}
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pthread_mutex_unlock(&ctrlr->ctrlr_lock);
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if (proc_found == false) {
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SPDK_ERRLOG("the active process is not found for this controller.");
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assert(proc_found);
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}
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STAILQ_FOREACH_SAFE(req, &proc->active_reqs, stailq, tmp_req) {
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STAILQ_REMOVE(&proc->active_reqs, req, nvme_request, stailq);
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assert(req->pid == pid);
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if (req->cb_fn) {
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req->cb_fn(req->cb_arg, &req->cpl);
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}
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nvme_free_request(req);
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}
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}
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static void
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static void
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nvme_pcie_qpair_submit_tracker(struct spdk_nvme_qpair *qpair, struct nvme_tracker *tr)
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nvme_pcie_qpair_submit_tracker(struct spdk_nvme_qpair *qpair, struct nvme_tracker *tr)
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{
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{
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@ -705,6 +797,7 @@ nvme_pcie_qpair_complete_tracker(struct spdk_nvme_qpair *qpair, struct nvme_trac
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struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
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struct nvme_pcie_qpair *pqpair = nvme_pcie_qpair(qpair);
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struct nvme_request *req;
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struct nvme_request *req;
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bool retry, error, was_active;
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bool retry, error, was_active;
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bool req_from_current_proc = true;
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req = tr->req;
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req = tr->req;
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@ -729,10 +822,19 @@ nvme_pcie_qpair_complete_tracker(struct spdk_nvme_qpair *qpair, struct nvme_trac
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nvme_pcie_qpair_submit_tracker(qpair, tr);
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nvme_pcie_qpair_submit_tracker(qpair, tr);
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} else {
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} else {
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if (was_active && req->cb_fn) {
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if (was_active && req->cb_fn) {
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/* Only check admin requests from different processes. */
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if (nvme_qpair_is_admin_queue(qpair) && req->pid != getpid()) {
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req_from_current_proc = false;
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nvme_pcie_qpair_insert_pending_admin_request(qpair, req, cpl);
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} else {
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req->cb_fn(req->cb_arg, cpl);
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req->cb_fn(req->cb_arg, cpl);
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}
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}
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}
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if (req_from_current_proc == true) {
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nvme_free_request(req);
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nvme_free_request(req);
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}
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tr->req = NULL;
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tr->req = NULL;
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LIST_REMOVE(tr, list);
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LIST_REMOVE(tr, list);
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@ -1483,6 +1585,11 @@ nvme_pcie_qpair_process_completions(struct spdk_nvme_qpair *qpair, uint32_t max_
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spdk_mmio_write_4(pqpair->cq_hdbl, pqpair->cq_head);
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spdk_mmio_write_4(pqpair->cq_hdbl, pqpair->cq_head);
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}
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}
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/* Before returning, complete any pending admin request. */
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if (nvme_qpair_is_admin_queue(qpair)) {
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nvme_pcie_qpair_complete_pending_admin_request(qpair);
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}
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return num_completions;
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return num_completions;
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}
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}
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@ -55,6 +55,12 @@ nvme_ctrlr_destruct(struct spdk_nvme_ctrlr *ctrlr)
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{
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{
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}
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}
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int
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nvme_ctrlr_add_process(struct spdk_nvme_ctrlr *ctrlr, void *devhandle)
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{
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return 0;
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}
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int
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int
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nvme_ctrlr_process_init(struct spdk_nvme_ctrlr *ctrlr)
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nvme_ctrlr_process_init(struct spdk_nvme_ctrlr *ctrlr)
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{
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{
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@ -376,6 +376,7 @@ nvme_allocate_request(const struct nvme_payload *payload, uint32_t payload_size,
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req->cb_fn = cb_fn;
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req->cb_fn = cb_fn;
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req->cb_arg = cb_arg;
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req->cb_arg = cb_arg;
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req->pid = getpid();
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}
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}
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return req;
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return req;
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@ -525,6 +526,9 @@ test_nvme_ctrlr_init_en_0_rdy_0_ams_rr(void)
|
|||||||
CU_ASSERT(g_ut_nvme_regs.cc.bits.ams == SPDK_NVME_CC_AMS_RR);
|
CU_ASSERT(g_ut_nvme_regs.cc.bits.ams == SPDK_NVME_CC_AMS_RR);
|
||||||
CU_ASSERT(ctrlr.opts.arb_mechanism == SPDK_NVME_CC_AMS_RR);
|
CU_ASSERT(ctrlr.opts.arb_mechanism == SPDK_NVME_CC_AMS_RR);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Complete and destroy the controller
|
||||||
|
*/
|
||||||
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
||||||
nvme_ctrlr_destruct(&ctrlr);
|
nvme_ctrlr_destruct(&ctrlr);
|
||||||
|
|
||||||
@ -546,6 +550,9 @@ test_nvme_ctrlr_init_en_0_rdy_0_ams_rr(void)
|
|||||||
CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1);
|
CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1);
|
||||||
CU_ASSERT(g_ut_nvme_regs.cc.bits.en == 0);
|
CU_ASSERT(g_ut_nvme_regs.cc.bits.en == 0);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Complete and destroy the controller
|
||||||
|
*/
|
||||||
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
||||||
nvme_ctrlr_destruct(&ctrlr);
|
nvme_ctrlr_destruct(&ctrlr);
|
||||||
|
|
||||||
@ -567,6 +574,9 @@ test_nvme_ctrlr_init_en_0_rdy_0_ams_rr(void)
|
|||||||
CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1);
|
CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1);
|
||||||
CU_ASSERT(g_ut_nvme_regs.cc.bits.en == 0);
|
CU_ASSERT(g_ut_nvme_regs.cc.bits.en == 0);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Complete and destroy the controller
|
||||||
|
*/
|
||||||
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
||||||
nvme_ctrlr_destruct(&ctrlr);
|
nvme_ctrlr_destruct(&ctrlr);
|
||||||
|
|
||||||
@ -588,6 +598,9 @@ test_nvme_ctrlr_init_en_0_rdy_0_ams_rr(void)
|
|||||||
CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1);
|
CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1);
|
||||||
CU_ASSERT(g_ut_nvme_regs.cc.bits.en == 0);
|
CU_ASSERT(g_ut_nvme_regs.cc.bits.en == 0);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Complete and destroy the controller
|
||||||
|
*/
|
||||||
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
||||||
nvme_ctrlr_destruct(&ctrlr);
|
nvme_ctrlr_destruct(&ctrlr);
|
||||||
|
|
||||||
@ -657,6 +670,9 @@ test_nvme_ctrlr_init_en_0_rdy_0_ams_wrr(void)
|
|||||||
CU_ASSERT(g_ut_nvme_regs.cc.bits.ams == SPDK_NVME_CC_AMS_RR);
|
CU_ASSERT(g_ut_nvme_regs.cc.bits.ams == SPDK_NVME_CC_AMS_RR);
|
||||||
CU_ASSERT(ctrlr.opts.arb_mechanism == SPDK_NVME_CC_AMS_RR);
|
CU_ASSERT(ctrlr.opts.arb_mechanism == SPDK_NVME_CC_AMS_RR);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Complete and destroy the controller
|
||||||
|
*/
|
||||||
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
||||||
nvme_ctrlr_destruct(&ctrlr);
|
nvme_ctrlr_destruct(&ctrlr);
|
||||||
|
|
||||||
@ -680,6 +696,9 @@ test_nvme_ctrlr_init_en_0_rdy_0_ams_wrr(void)
|
|||||||
CU_ASSERT(g_ut_nvme_regs.cc.bits.ams == SPDK_NVME_CC_AMS_WRR);
|
CU_ASSERT(g_ut_nvme_regs.cc.bits.ams == SPDK_NVME_CC_AMS_WRR);
|
||||||
CU_ASSERT(ctrlr.opts.arb_mechanism == SPDK_NVME_CC_AMS_WRR);
|
CU_ASSERT(ctrlr.opts.arb_mechanism == SPDK_NVME_CC_AMS_WRR);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Complete and destroy the controller
|
||||||
|
*/
|
||||||
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
||||||
nvme_ctrlr_destruct(&ctrlr);
|
nvme_ctrlr_destruct(&ctrlr);
|
||||||
|
|
||||||
@ -701,6 +720,9 @@ test_nvme_ctrlr_init_en_0_rdy_0_ams_wrr(void)
|
|||||||
CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1);
|
CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1);
|
||||||
CU_ASSERT(g_ut_nvme_regs.cc.bits.en == 0);
|
CU_ASSERT(g_ut_nvme_regs.cc.bits.en == 0);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Complete and destroy the controller
|
||||||
|
*/
|
||||||
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
||||||
nvme_ctrlr_destruct(&ctrlr);
|
nvme_ctrlr_destruct(&ctrlr);
|
||||||
|
|
||||||
@ -722,6 +744,9 @@ test_nvme_ctrlr_init_en_0_rdy_0_ams_wrr(void)
|
|||||||
CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1);
|
CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1);
|
||||||
CU_ASSERT(g_ut_nvme_regs.cc.bits.en == 0);
|
CU_ASSERT(g_ut_nvme_regs.cc.bits.en == 0);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Complete and destroy the controller
|
||||||
|
*/
|
||||||
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
||||||
nvme_ctrlr_destruct(&ctrlr);
|
nvme_ctrlr_destruct(&ctrlr);
|
||||||
|
|
||||||
@ -790,6 +815,9 @@ test_nvme_ctrlr_init_en_0_rdy_0_ams_vs(void)
|
|||||||
CU_ASSERT(g_ut_nvme_regs.cc.bits.ams == SPDK_NVME_CC_AMS_RR);
|
CU_ASSERT(g_ut_nvme_regs.cc.bits.ams == SPDK_NVME_CC_AMS_RR);
|
||||||
CU_ASSERT(ctrlr.opts.arb_mechanism == SPDK_NVME_CC_AMS_RR);
|
CU_ASSERT(ctrlr.opts.arb_mechanism == SPDK_NVME_CC_AMS_RR);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Complete and destroy the controller
|
||||||
|
*/
|
||||||
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
||||||
nvme_ctrlr_destruct(&ctrlr);
|
nvme_ctrlr_destruct(&ctrlr);
|
||||||
|
|
||||||
@ -811,6 +839,9 @@ test_nvme_ctrlr_init_en_0_rdy_0_ams_vs(void)
|
|||||||
CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1);
|
CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1);
|
||||||
CU_ASSERT(g_ut_nvme_regs.cc.bits.en == 0);
|
CU_ASSERT(g_ut_nvme_regs.cc.bits.en == 0);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Complete and destroy the controller
|
||||||
|
*/
|
||||||
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
||||||
nvme_ctrlr_destruct(&ctrlr);
|
nvme_ctrlr_destruct(&ctrlr);
|
||||||
|
|
||||||
@ -834,6 +865,9 @@ test_nvme_ctrlr_init_en_0_rdy_0_ams_vs(void)
|
|||||||
CU_ASSERT(g_ut_nvme_regs.cc.bits.ams == SPDK_NVME_CC_AMS_VS);
|
CU_ASSERT(g_ut_nvme_regs.cc.bits.ams == SPDK_NVME_CC_AMS_VS);
|
||||||
CU_ASSERT(ctrlr.opts.arb_mechanism == SPDK_NVME_CC_AMS_VS);
|
CU_ASSERT(ctrlr.opts.arb_mechanism == SPDK_NVME_CC_AMS_VS);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Complete and destroy the controller
|
||||||
|
*/
|
||||||
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
||||||
nvme_ctrlr_destruct(&ctrlr);
|
nvme_ctrlr_destruct(&ctrlr);
|
||||||
|
|
||||||
@ -855,6 +889,9 @@ test_nvme_ctrlr_init_en_0_rdy_0_ams_vs(void)
|
|||||||
CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1);
|
CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_ENABLE_WAIT_FOR_READY_1);
|
||||||
CU_ASSERT(g_ut_nvme_regs.cc.bits.en == 0);
|
CU_ASSERT(g_ut_nvme_regs.cc.bits.en == 0);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Complete and destroy the controller
|
||||||
|
*/
|
||||||
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
g_ut_nvme_regs.csts.bits.shst = SPDK_NVME_SHST_COMPLETE;
|
||||||
nvme_ctrlr_destruct(&ctrlr);
|
nvme_ctrlr_destruct(&ctrlr);
|
||||||
|
|
||||||
|
@ -253,6 +253,8 @@ nvme_allocate_request(const struct nvme_payload *payload, uint32_t payload_size,
|
|||||||
req->cb_fn = cb_fn;
|
req->cb_fn = cb_fn;
|
||||||
req->cb_arg = cb_arg;
|
req->cb_arg = cb_arg;
|
||||||
|
|
||||||
|
req->pid = getpid();
|
||||||
|
|
||||||
return req;
|
return req;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -65,6 +65,12 @@ nvme_ctrlr_destruct(struct spdk_nvme_ctrlr *ctrlr)
|
|||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
|
int
|
||||||
|
nvme_ctrlr_add_process(struct spdk_nvme_ctrlr *ctrlr, void *devhandle)
|
||||||
|
{
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nvme_ctrlr_process_init(struct spdk_nvme_ctrlr *ctrlr)
|
nvme_ctrlr_process_init(struct spdk_nvme_ctrlr *ctrlr)
|
||||||
{
|
{
|
||||||
|
@ -146,6 +146,7 @@ nvme_allocate_request(const struct nvme_payload *payload, uint32_t payload_size,
|
|||||||
req->cb_arg = cb_arg;
|
req->cb_arg = cb_arg;
|
||||||
req->payload = *payload;
|
req->payload = *payload;
|
||||||
req->payload_size = payload_size;
|
req->payload_size = payload_size;
|
||||||
|
req->pid = getpid();
|
||||||
|
|
||||||
return req;
|
return req;
|
||||||
}
|
}
|
||||||
@ -223,6 +224,7 @@ prepare_submit_request_test(struct spdk_nvme_qpair *qpair,
|
|||||||
ctrlr->transport = &nvme_qpair_ut_transport;
|
ctrlr->transport = &nvme_qpair_ut_transport;
|
||||||
ctrlr->free_io_qids = NULL;
|
ctrlr->free_io_qids = NULL;
|
||||||
TAILQ_INIT(&ctrlr->active_io_qpairs);
|
TAILQ_INIT(&ctrlr->active_io_qpairs);
|
||||||
|
TAILQ_INIT(&ctrlr->active_procs);
|
||||||
nvme_qpair_construct(qpair, 1, 128, ctrlr, 0);
|
nvme_qpair_construct(qpair, 1, 128, ctrlr, 0);
|
||||||
|
|
||||||
ut_fail_vtophys = false;
|
ut_fail_vtophys = false;
|
||||||
@ -581,6 +583,7 @@ static void test_nvme_qpair_destroy(void)
|
|||||||
memset(&ctrlr, 0, sizeof(ctrlr));
|
memset(&ctrlr, 0, sizeof(ctrlr));
|
||||||
TAILQ_INIT(&ctrlr.free_io_qpairs);
|
TAILQ_INIT(&ctrlr.free_io_qpairs);
|
||||||
TAILQ_INIT(&ctrlr.active_io_qpairs);
|
TAILQ_INIT(&ctrlr.active_io_qpairs);
|
||||||
|
TAILQ_INIT(&ctrlr.active_procs);
|
||||||
|
|
||||||
nvme_qpair_construct(&qpair, 1, 128, &ctrlr);
|
nvme_qpair_construct(&qpair, 1, 128, &ctrlr);
|
||||||
nvme_qpair_destroy(&qpair);
|
nvme_qpair_destroy(&qpair);
|
||||||
|
Loading…
Reference in New Issue
Block a user