diff --git a/include/spdk/pci_ids.h b/include/spdk/pci_ids.h index a087b9cdf..6b3e7b5f9 100644 --- a/include/spdk/pci_ids.h +++ b/include/spdk/pci_ids.h @@ -47,6 +47,7 @@ extern "C" { #define SPDK_PCI_ANY_ID 0xffff #define SPDK_PCI_VID_INTEL 0x8086 #define SPDK_PCI_VID_MEMBLAZE 0x1c5f +#define SPDK_PCI_VID_SAMSUNG 0x144d #define SPDK_PCI_VID_VIRTUALBOX 0x80ee #define SPDK_PCI_VID_VIRTIO 0x1af4 #define SPDK_PCI_VID_CNEXLABS 0x1d1d diff --git a/lib/nvme/nvme_ctrlr.c b/lib/nvme/nvme_ctrlr.c index 36f8be347..5f14a4e1a 100644 --- a/lib/nvme/nvme_ctrlr.c +++ b/lib/nvme/nvme_ctrlr.c @@ -1589,12 +1589,12 @@ nvme_ctrlr_process_init(struct spdk_nvme_ctrlr *ctrlr) nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_DISABLE_WAIT_FOR_READY_0, ready_timeout_in_ms); /* - * Wait 2 secsonds before accessing PCI registers. + * Wait 2.5 seconds before accessing PCI registers. * Not using sleep() to avoid blocking other controller's initialization. */ if (ctrlr->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) { - SPDK_DEBUGLOG(SPDK_LOG_NVME, "Applying quirk: delay 2 seconds before reading registers\n"); - ctrlr->sleep_timeout_tsc = spdk_get_ticks() + 2 * spdk_get_ticks_hz(); + SPDK_DEBUGLOG(SPDK_LOG_NVME, "Applying quirk: delay 2.5 seconds before reading registers\n"); + ctrlr->sleep_timeout_tsc = spdk_get_ticks() + (2500 * spdk_get_ticks_hz() / 1000); } return 0; } else { diff --git a/lib/nvme/nvme_quirks.c b/lib/nvme/nvme_quirks.c index 65f0d3d5c..73dc76442 100644 --- a/lib/nvme/nvme_quirks.c +++ b/lib/nvme/nvme_quirks.c @@ -66,6 +66,12 @@ static const struct nvme_quirk nvme_quirks[] = { { {SPDK_PCI_VID_MEMBLAZE, 0x0540, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID}, NVME_QUIRK_DELAY_BEFORE_CHK_RDY }, + { {SPDK_PCI_VID_SAMSUNG, 0xa821, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID}, + NVME_QUIRK_DELAY_BEFORE_CHK_RDY + }, + { {SPDK_PCI_VID_SAMSUNG, 0xa822, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID}, + NVME_QUIRK_DELAY_BEFORE_CHK_RDY + }, { {SPDK_PCI_VID_VIRTUALBOX, 0x4e56, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID}, NVME_QUIRK_DELAY_AFTER_QUEUE_ALLOC },