iommu: Read AMD iommu address width
Add code needed to read the virtual address width for AMD processors Fixes issue 2686 Signed-off-by: Michael Piszczek <mpiszczek@ddn.com> Change-Id: I44f988e60d7bbfb1cb137b3cbc4ac44dbb693d35 Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/14416 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Shuhei Matsumoto <smatsumoto@nvidia.com>
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@ -154,6 +154,36 @@ push_arg(char *args[], int *argcount, char *arg)
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#define SPDK_IOMMU_VA_REQUIRED_WIDTH 48
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#define VTD_CAP_MGAW_SHIFT 16
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#define VTD_CAP_MGAW_MASK (0x3F << VTD_CAP_MGAW_SHIFT)
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#define RD_AMD_CAP_VASIZE_SHIFT 15
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#define RD_AMD_CAP_VASIZE_MASK (0x7F << RD_AMD_CAP_VASIZE_SHIFT)
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static int
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get_amd_iommu_width(void)
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{
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FILE *file;
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char buf[64];
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char *end;
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long long int amd_cap;
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file = fopen("/sys/class/iommu/ivhd2/amd-iommu/cap", "r");
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if (file == NULL) {
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return 0;
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}
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if (fgets(buf, sizeof(buf), file) == NULL) {
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fclose(file);
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return 0;
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}
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amd_cap = strtoll(buf, &end, 16);
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if (amd_cap == LLONG_MIN || amd_cap == LLONG_MAX) {
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fclose(file);
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return 0;
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}
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fclose(file);
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return (amd_cap & RD_AMD_CAP_VASIZE_MASK) >> RD_AMD_CAP_VASIZE_SHIFT;
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}
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static int
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get_iommu_width(void)
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@ -166,6 +196,11 @@ get_iommu_width(void)
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char *end;
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long long int val;
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int width, tmp;
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struct stat s;
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if (stat("/sys/class/iommu/ivhd2/amd-iommu", &s) == 0) {
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return get_amd_iommu_width();
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}
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dir = opendir("/sys/devices/virtual/iommu/");
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if (dir == NULL) {
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