iommu: Read AMD iommu address width

Add code needed to read the virtual address width for AMD processors

Fixes issue 2686

Signed-off-by: Michael Piszczek <mpiszczek@ddn.com>
Change-Id: I44f988e60d7bbfb1cb137b3cbc4ac44dbb693d35
Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/14416
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Shuhei Matsumoto <smatsumoto@nvidia.com>
This commit is contained in:
Michael Piszczek 2022-09-07 15:42:23 +00:00 committed by Tomasz Zawadzki
parent c8e594c2a0
commit 9ffb0497c1

View File

@ -154,6 +154,36 @@ push_arg(char *args[], int *argcount, char *arg)
#define SPDK_IOMMU_VA_REQUIRED_WIDTH 48 #define SPDK_IOMMU_VA_REQUIRED_WIDTH 48
#define VTD_CAP_MGAW_SHIFT 16 #define VTD_CAP_MGAW_SHIFT 16
#define VTD_CAP_MGAW_MASK (0x3F << VTD_CAP_MGAW_SHIFT) #define VTD_CAP_MGAW_MASK (0x3F << VTD_CAP_MGAW_SHIFT)
#define RD_AMD_CAP_VASIZE_SHIFT 15
#define RD_AMD_CAP_VASIZE_MASK (0x7F << RD_AMD_CAP_VASIZE_SHIFT)
static int
get_amd_iommu_width(void)
{
FILE *file;
char buf[64];
char *end;
long long int amd_cap;
file = fopen("/sys/class/iommu/ivhd2/amd-iommu/cap", "r");
if (file == NULL) {
return 0;
}
if (fgets(buf, sizeof(buf), file) == NULL) {
fclose(file);
return 0;
}
amd_cap = strtoll(buf, &end, 16);
if (amd_cap == LLONG_MIN || amd_cap == LLONG_MAX) {
fclose(file);
return 0;
}
fclose(file);
return (amd_cap & RD_AMD_CAP_VASIZE_MASK) >> RD_AMD_CAP_VASIZE_SHIFT;
}
static int static int
get_iommu_width(void) get_iommu_width(void)
@ -166,6 +196,11 @@ get_iommu_width(void)
char *end; char *end;
long long int val; long long int val;
int width, tmp; int width, tmp;
struct stat s;
if (stat("/sys/class/iommu/ivhd2/amd-iommu", &s) == 0) {
return get_amd_iommu_width();
}
dir = opendir("/sys/devices/virtual/iommu/"); dir = opendir("/sys/devices/virtual/iommu/");
if (dir == NULL) { if (dir == NULL) {