nvme: Allow users to request which I/O command set they'd like to use
As of NVMe 1.3b, there is only one command set. But pipe this through the driver per-spec anyway. Change-Id: I4faf8596f5ce638e5e2a500b424e00ceb6e89edc Signed-off-by: Ben Walker <benjamin.walker@intel.com> Reviewed-on: https://review.gerrithub.io/412102 Tested-by: SPDK Automated Test System <sys_sgsw@intel.com> Reviewed-by: Daniel Verkamp <daniel.verkamp@intel.com> Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
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@ -823,7 +823,7 @@ print_controller(struct spdk_nvme_ctrlr *ctrlr, const struct spdk_nvme_transport
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cap.bits.nssrs ? "Supported" : "Not Supported");
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printf("Command Sets Supported\n");
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printf(" NVM Command Set: %s\n",
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cap.bits.css_nvm ? "Supported" : "Not Supported");
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cap.bits.css & SPDK_NVME_CAP_CSS_NVM ? "Supported" : "Not Supported");
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printf("Boot Partition: %s\n",
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cap.bits.bps ? "Supported" : "Not Supported");
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printf("Memory Page Size Minimum: %" PRIu64 " bytes\n",
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@ -144,6 +144,15 @@ struct spdk_nvme_ctrlr_opts {
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* Set to all zeroes to specify that no host ID should be provided to the controller.
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*/
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uint8_t extended_host_id[16];
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/**
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* The I/O command set to select.
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*
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* If the requested command set is not supported, the controller
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* initialization process will not proceed. By default, the NVM
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* command set is used.
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*/
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enum spdk_nvme_cc_css command_set;
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};
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/**
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@ -96,9 +96,7 @@ union spdk_nvme_cap_register {
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uint32_t nssrs : 1;
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/** command sets supported */
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uint32_t css_nvm : 1;
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uint32_t css_reserved : 7;
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uint32_t css : 8;
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/** boot partition support */
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uint32_t bps : 1;
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@ -116,6 +114,17 @@ union spdk_nvme_cap_register {
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};
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SPDK_STATIC_ASSERT(sizeof(union spdk_nvme_cap_register) == 8, "Incorrect size");
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/**
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* I/O Command Set Selected
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*
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* Only a single command set is defined as of NVMe 1.3 (NVM).
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*/
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enum spdk_nvme_cc_css {
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SPDK_NVME_CC_CSS_NVM = 0x0, /**< NVM command set */
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};
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#define SPDK_NVME_CAP_CSS_NVM (1u << SPDK_NVME_CC_CSS_NVM) /**< NVM command set supported */
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union spdk_nvme_cc_register {
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uint32_t raw;
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struct {
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@ -134,6 +134,10 @@ spdk_nvme_ctrlr_get_default_ctrlr_opts(struct spdk_nvme_ctrlr_opts *opts, size_t
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if (FIELD_OK(src_svcid)) {
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memset(opts->src_svcid, 0, sizeof(opts->src_svcid));
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}
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if (FIELD_OK(command_set)) {
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opts->command_set = SPDK_NVME_CC_CSS_NVM;
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}
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#undef FIELD_OK
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}
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@ -553,6 +557,20 @@ nvme_ctrlr_enable(struct spdk_nvme_ctrlr *ctrlr)
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/* Page size is 2 ^ (12 + mps). */
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cc.bits.mps = spdk_u32log2(ctrlr->page_size) - 12;
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if (ctrlr->cap.bits.css == 0) {
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SPDK_INFOLOG(SPDK_LOG_NVME,
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"Drive reports no command sets supported. Assuming NVM is supported.\n");
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ctrlr->cap.bits.css = SPDK_NVME_CAP_CSS_NVM;
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}
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if (!(ctrlr->cap.bits.css & (1u << ctrlr->opts.command_set))) {
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SPDK_DEBUGLOG(SPDK_LOG_NVME, "Requested I/O command set %u but supported mask is 0x%x\n",
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ctrlr->opts.command_set, ctrlr->cap.bits.css);
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return -EINVAL;
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}
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cc.bits.css = ctrlr->opts.command_set;
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switch (ctrlr->opts.arb_mechanism) {
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case SPDK_NVME_CC_AMS_RR:
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break;
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@ -166,7 +166,7 @@ spdk_nvmf_ctrlr_create(struct spdk_nvmf_subsystem *subsystem,
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ctrlr->vcprop.cap.bits.ams = 0; /* optional arb mechanisms */
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ctrlr->vcprop.cap.bits.to = 1; /* ready timeout - 500 msec units */
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ctrlr->vcprop.cap.bits.dstrd = 0; /* fixed to 0 for NVMe-oF */
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ctrlr->vcprop.cap.bits.css_nvm = 1; /* NVM command set */
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ctrlr->vcprop.cap.bits.css = SPDK_NVME_CAP_CSS_NVM; /* NVM command set */
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ctrlr->vcprop.cap.bits.mpsmin = 0; /* 2 ^ (12 + mpsmin) == 4k */
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ctrlr->vcprop.cap.bits.mpsmax = 0; /* 2 ^ (12 + mpsmax) == 4k */
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@ -1216,7 +1216,7 @@ spdk_vhost_nvme_ctrlr_identify_update(struct spdk_vhost_nvme_dev *dev)
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dev->cap.bits.cqr = 1;
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dev->cap.bits.to = 1;
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dev->cap.bits.dstrd = 0;
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dev->cap.bits.css_nvm = 1;
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dev->cap.bits.css = SPDK_NVME_CAP_CSS_NVM;
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dev->cap.bits.mpsmin = 0;
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dev->cap.bits.mpsmax = 0;
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/* MQES is 0 based value */
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