From 94cec6a78aae6153b92770b18b9e9fde0eca46a5 Mon Sep 17 00:00:00 2001
From: Konrad Sztyber <konrad.sztyber@intel.com>
Date: Tue, 22 Jun 2021 16:42:32 +0200
Subject: [PATCH] ut/nvme_ctrlr: asynchronous register get/set mocks

Added mocks in preparation for making the NVMe controller initialization
use asynchronous versions of the register operations.

Signed-off-by: Konrad Sztyber <konrad.sztyber@intel.com>
Change-Id: Ifbcc3c73933fb965db710389fec8cd2d52886d4d
Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/8610
Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com>
Community-CI: Mellanox Build Bot
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: Aleksey Marchuk <alexeymar@mellanox.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
Reviewed-by: Monica Kenguva <monica.kenguva@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
---
 .../lib/nvme/nvme_ctrlr.c/nvme_ctrlr_ut.c     | 58 +++++++++++++++++++
 1 file changed, 58 insertions(+)

diff --git a/test/unit/lib/nvme/nvme_ctrlr.c/nvme_ctrlr_ut.c b/test/unit/lib/nvme/nvme_ctrlr.c/nvme_ctrlr_ut.c
index 5b734e84a..28ea74909 100644
--- a/test/unit/lib/nvme/nvme_ctrlr.c/nvme_ctrlr_ut.c
+++ b/test/unit/lib/nvme/nvme_ctrlr.c/nvme_ctrlr_ut.c
@@ -149,6 +149,64 @@ nvme_transport_ctrlr_get_reg_8(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset, u
 	return 0;
 }
 
+int
+nvme_transport_ctrlr_set_reg_4_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
+				     uint32_t value, spdk_nvme_reg_cb cb_fn, void *cb_arg)
+{
+	struct spdk_nvme_cpl cpl = {};
+
+	cpl.status.sct = SPDK_NVME_SCT_GENERIC;
+	cpl.status.sc = SPDK_NVME_SC_SUCCESS;
+
+	nvme_transport_ctrlr_set_reg_4(ctrlr, offset, value);
+	cb_fn(cb_arg, value, &cpl);
+	return 0;
+}
+
+int
+nvme_transport_ctrlr_set_reg_8_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
+				     uint64_t value, spdk_nvme_reg_cb cb_fn, void *cb_arg)
+{
+	struct spdk_nvme_cpl cpl = {};
+
+	cpl.status.sct = SPDK_NVME_SCT_GENERIC;
+	cpl.status.sc = SPDK_NVME_SC_SUCCESS;
+
+	nvme_transport_ctrlr_set_reg_8(ctrlr, offset, value);
+	cb_fn(cb_arg, value, &cpl);
+	return 0;
+}
+
+int
+nvme_transport_ctrlr_get_reg_4_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
+				     spdk_nvme_reg_cb cb_fn, void *cb_arg)
+{
+	struct spdk_nvme_cpl cpl = {};
+	uint32_t value;
+
+	cpl.status.sct = SPDK_NVME_SCT_GENERIC;
+	cpl.status.sc = SPDK_NVME_SC_SUCCESS;
+
+	nvme_transport_ctrlr_get_reg_4(ctrlr, offset, &value);
+	cb_fn(cb_arg, value, &cpl);
+	return 0;
+}
+
+int
+nvme_transport_ctrlr_get_reg_8_async(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset,
+				     spdk_nvme_reg_cb cb_fn, void *cb_arg)
+{
+	struct spdk_nvme_cpl cpl = {};
+	uint64_t value;
+
+	cpl.status.sct = SPDK_NVME_SCT_GENERIC;
+	cpl.status.sc = SPDK_NVME_SC_SUCCESS;
+
+	nvme_transport_ctrlr_get_reg_8(ctrlr, offset, &value);
+	cb_fn(cb_arg, value, &cpl);
+	return 0;
+}
+
 uint32_t
 nvme_transport_ctrlr_get_max_xfer_size(struct spdk_nvme_ctrlr *ctrlr)
 {