From 75440d0537b98721404d10cb56a76cf9f2d2d0d7 Mon Sep 17 00:00:00 2001 From: Michael Bang Date: Thu, 21 Jan 2021 12:52:21 +0100 Subject: [PATCH] doc: correct explanation of NVMe SQ command submission Correct explanation of NVMe SQ command submission Change-Id: Ibdb3d13369c916708269c18fc04d5680044fce8e Signed-off-by: Michael Bang Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/6027 Community-CI: Mellanox Build Bot Reviewed-by: Changpeng Liu Reviewed-by: sunshihao Reviewed-by: Jim Harris Reviewed-by: Aleksey Marchuk Tested-by: SPDK CI Jenkins --- doc/nvme_spec.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/doc/nvme_spec.md b/doc/nvme_spec.md index 123e631e4..7145d406e 100644 --- a/doc/nvme_spec.md +++ b/doc/nvme_spec.md @@ -20,8 +20,8 @@ registers involved that are called doorbells. An I/O is submitted to an NVMe device by constructing a 64 byte command, placing it into the submission queue at the current location of the submission queue -head index, and then writing the new index of the submission queue head to the -submission queue head doorbell register. It's actually valid to copy a whole set +tail index, and then writing the new index of the submission queue tail to the +submission queue tail doorbell register. It's actually valid to copy a whole set of commands into open slots in the ring and then write the doorbell just one time to submit the whole batch.