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test/nvme/sgl: add SGL element offset field

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This allows us to test elements with particular (mis-)alignments without
depending on the internal behavior of the DPDK allocator.

Change-Id: I006358b82ae3a677353333954ba88d1bcfe289f6
Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com>
This commit is contained in:
Daniel Verkamp 2016-03-16 11:12:49 -07:00
parent dffd55353b
commit 50e43f1ea0
1 changed files with 9 additions and 19 deletions
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28
test/lib/nvme/sgl/nvme_sgl.c
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@ -69,6 +69,7 @@ static int io_complete_flag = 0;
struct sgl_element { struct sgl_element {
void *base; void *base;
size_t offset;
size_t len; size_t len;
}; };
@ -111,11 +112,11 @@ static int nvme_request_next_sge(void *cb_arg, uint64_t *address, uint32_t *leng
iov = &req->iovs[req->current_iov_index]; iov = &req->iovs[req->current_iov_index];
if (req->current_iov_bytes_left) { if (req->current_iov_bytes_left) {
*address = rte_malloc_virt2phy(iov->base) + iov->len - req->current_iov_bytes_left; *address = rte_malloc_virt2phy(iov->base) + iov->offset + iov->len - req->current_iov_bytes_left;
*length = req->current_iov_bytes_left; *length = req->current_iov_bytes_left;
req->current_iov_bytes_left = 0; req->current_iov_bytes_left = 0;
} else { } else {
*address = rte_malloc_virt2phy(iov->base); *address = rte_malloc_virt2phy(iov->base) + iov->offset;
*length = iov->len; *length = iov->len;
} }
@ -185,26 +186,15 @@ static uint32_t build_io_request_2(struct io_request *req)
static uint32_t build_io_request_3(struct io_request *req) static uint32_t build_io_request_3(struct io_request *req)
{ {
int i, found = 0; int i;
uint8_t *buf;
uint64_t v_addr;
uint32_t len = 0; uint32_t len = 0;
req->nseg = 3; req->nseg = 3;
/* 2KB for 1st sge, make sure the iov address start at 0x800 boundary, /* 2KB for 1st sge, make sure the iov address start at 0x800 boundary,
* and end with 0x1000 boundary */ * and end with 0x1000 boundary */
for (i = 0; i < 8; i++) { req->iovs[0].base = rte_zmalloc(NULL, 0x1000, 0x1000);
buf = rte_zmalloc(NULL, 0x800, 0x800); req->iovs[0].offset = 0x800;
v_addr = (uint64_t)buf;
if (v_addr & 0x800ULL) {
found = 1;
break;
}
}
if (!found)
return 0;
req->iovs[0].base = rte_zmalloc(NULL, 0x800, 0x800);
req->iovs[0].len = 0x800; req->iovs[0].len = 0x800;
/* 4KB for 2th sge */ /* 4KB for 2th sge */
@ -331,7 +321,7 @@ writev_readv_tests(struct dev *dev, nvme_build_io_req_fn_t build_io_fn, const ch
nseg = req->nseg; nseg = req->nseg;
for (i = 0; i < nseg; i++) { for (i = 0; i < nseg; i++) {
memset(req->iovs[i].base, DATA_PATTERN, req->iovs[i].len); memset(req->iovs[i].base + req->iovs[i].offset, DATA_PATTERN, req->iovs[i].len);
} }
rc = spdk_nvme_ns_cmd_writev(ns, qpair, BASE_LBA_START, lba_count, rc = spdk_nvme_ns_cmd_writev(ns, qpair, BASE_LBA_START, lba_count,
@ -362,7 +352,7 @@ writev_readv_tests(struct dev *dev, nvme_build_io_req_fn_t build_io_fn, const ch
io_complete_flag = 0; io_complete_flag = 0;
for (i = 0; i < nseg; i++) { for (i = 0; i < nseg; i++) {
memset(req->iovs[i].base, 0, req->iovs[i].len); memset(req->iovs[i].base + req->iovs[i].offset, 0, req->iovs[i].len);
} }
rc = spdk_nvme_ns_cmd_readv(ns, qpair, BASE_LBA_START, lba_count, rc = spdk_nvme_ns_cmd_readv(ns, qpair, BASE_LBA_START, lba_count,
@ -388,7 +378,7 @@ writev_readv_tests(struct dev *dev, nvme_build_io_req_fn_t build_io_fn, const ch
} }
for (i = 0; i < nseg; i++) { for (i = 0; i < nseg; i++) {
buf = (char *)req->iovs[i].base; buf = (char *)req->iovs[i].base + req->iovs[i].offset;
for (j = 0; j < req->iovs[i].len; j++) { for (j = 0; j < req->iovs[i].len; j++) {
if (buf[j] != DATA_PATTERN) { if (buf[j] != DATA_PATTERN) {
fprintf(stderr, "%s: %s write/read success, but memcmp Failed\n", dev->name, test_name); fprintf(stderr, "%s: %s write/read success, but memcmp Failed\n", dev->name, test_name);