From 3d7bcab40ae68527188b07e7a21489c46fa9b7b9 Mon Sep 17 00:00:00 2001
From: Ziye Yang <ziye.yang@intel.com>
Date: Tue, 16 Feb 2016 10:11:25 +0800
Subject: [PATCH] SPDK:  Add spdk_pci_device_cfg read/write for byte, word.

This patch is used to support spdk_pci_device_cfg read/write
with byte and word size.

Change-Id: I49084e231bd6b5f5b22180a3eb36ddad4430b3a4
Signed-off-by: Ziye Yang <ziye.yang@intel.com>
---
 include/spdk/pci.h |  4 ++++
 lib/util/pci.c     | 48 ++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 52 insertions(+)

diff --git a/include/spdk/pci.h b/include/spdk/pci.h
index a2f8e5884..7d71e79f3 100644
--- a/include/spdk/pci.h
+++ b/include/spdk/pci.h
@@ -57,6 +57,10 @@ uint16_t spdk_pci_device_get_subdevice_id(struct spdk_pci_device *dev);
 uint32_t spdk_pci_device_get_class(struct spdk_pci_device *dev);
 const char *spdk_pci_device_get_device_name(struct spdk_pci_device *dev);
 
+int spdk_pci_device_cfg_read8(struct spdk_pci_device *dev, uint8_t *value, uint32_t offset);
+int spdk_pci_device_cfg_write8(struct spdk_pci_device *dev, uint8_t value, uint32_t offset);
+int spdk_pci_device_cfg_read16(struct spdk_pci_device *dev, uint16_t *value, uint32_t offset);
+int spdk_pci_device_cfg_write16(struct spdk_pci_device *dev, uint16_t value, uint32_t offset);
 int spdk_pci_device_cfg_read32(struct spdk_pci_device *dev, uint32_t *value, uint32_t offset);
 int spdk_pci_device_cfg_write32(struct spdk_pci_device *dev, uint32_t value, uint32_t offset);
 
diff --git a/lib/util/pci.c b/lib/util/pci.c
index a0751e49f..1a70d2103 100644
--- a/lib/util/pci.c
+++ b/lib/util/pci.c
@@ -162,6 +162,30 @@ spdk_pci_device_get_device_name(struct spdk_pci_device *dev)
 	return pci_device_get_device_name(dev);
 }
 
+int
+spdk_pci_device_cfg_read8(struct spdk_pci_device *dev, uint8_t *value, uint32_t offset)
+{
+	return pci_device_cfg_read_u8(dev, value, offset);
+}
+
+int
+spdk_pci_device_cfg_write8(struct spdk_pci_device *dev, uint8_t value, uint32_t offset)
+{
+	return pci_device_cfg_write_u8(dev, value, offset);
+}
+
+int
+spdk_pci_device_cfg_read16(struct spdk_pci_device *dev, uint16_t *value, uint32_t offset)
+{
+	return pci_device_cfg_read_u16(dev, value, offset);
+}
+
+int
+spdk_pci_device_cfg_write16(struct spdk_pci_device *dev, uint16_t value, uint32_t offset)
+{
+	return pci_device_cfg_write_u16(dev, value, offset);
+}
+
 int
 spdk_pci_device_cfg_read32(struct spdk_pci_device *dev, uint32_t *value, uint32_t offset)
 {
@@ -314,6 +338,30 @@ spdk_pci_device_get_device_name(struct spdk_pci_device *dev)
 	return NULL;
 }
 
+int
+spdk_pci_device_cfg_read8(struct spdk_pci_device *dev, uint8_t *value, uint32_t offset)
+{
+	return rte_eal_pci_read_config(dev, value, 1, offset) == 1 ? 0 : -1;
+}
+
+int
+spdk_pci_device_cfg_write8(struct spdk_pci_device *dev, uint8_t value, uint32_t offset)
+{
+	return rte_eal_pci_write_config(dev, &value, 1, offset) == 1 ? 0 : -1;
+}
+
+int
+spdk_pci_device_cfg_read16(struct spdk_pci_device *dev, uint16_t *value, uint32_t offset)
+{
+	return rte_eal_pci_read_config(dev, value, 2, offset) == 2 ? 0 : -1;
+}
+
+int
+spdk_pci_device_cfg_write16(struct spdk_pci_device *dev, uint16_t value, uint32_t offset)
+{
+	return rte_eal_pci_write_config(dev, &value, 2, offset) == 2 ? 0 : -1;
+}
+
 int
 spdk_pci_device_cfg_read32(struct spdk_pci_device *dev, uint32_t *value, uint32_t offset)
 {