nvme: make enum spdk_nvme_ctrlr_flags more readable
Make enum spdk_nvme_ctrlr_flags more readable. Other enums in spdk, e.g. enum accel_capability, and enum NVME_RDMA_COMPLETION_FLAGS, already define the enum values using bit shifts. Do the same for enum spdk_nvme_ctrlr_flags. No functional change intended. Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com> Change-Id: Ida7d7e4ff7f4cffce85cb2d6ea2bc0168875fdb8 Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/5158 Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Aleksey Marchuk <alexeymar@mellanox.com> Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com> Reviewed-by: Paul Luse <paul.e.luse@intel.com> Community-CI: Broadcom CI Community-CI: Mellanox Build Bot Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
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@ -420,11 +420,11 @@ struct spdk_nvme_host_id {
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* Used for identifying if the controller supports these flags.
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*/
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enum spdk_nvme_ctrlr_flags {
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SPDK_NVME_CTRLR_SGL_SUPPORTED = 0x1, /**< SGL is supported */
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SPDK_NVME_CTRLR_SECURITY_SEND_RECV_SUPPORTED = 0x2, /**< security send/receive is supported */
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SPDK_NVME_CTRLR_WRR_SUPPORTED = 0x4, /**< Weighted Round Robin is supported */
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SPDK_NVME_CTRLR_COMPARE_AND_WRITE_SUPPORTED = 0x8, /**< Compare and write fused operations supported */
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SPDK_NVME_CTRLR_SGL_REQUIRES_DWORD_ALIGNMENT = 0x10, /**< Dword alignment is required for SGL */
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SPDK_NVME_CTRLR_SGL_SUPPORTED = 1 << 0, /**< SGL is supported */
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SPDK_NVME_CTRLR_SECURITY_SEND_RECV_SUPPORTED = 1 << 1, /**< security send/receive is supported */
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SPDK_NVME_CTRLR_WRR_SUPPORTED = 1 << 2, /**< Weighted Round Robin is supported */
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SPDK_NVME_CTRLR_COMPARE_AND_WRITE_SUPPORTED = 1 << 3, /**< Compare and write fused operations supported */
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SPDK_NVME_CTRLR_SGL_REQUIRES_DWORD_ALIGNMENT = 1 << 4, /**< Dword alignment is required for SGL */
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};
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/**
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