From 2d686707df37b8752f31684db16b689637ba141d Mon Sep 17 00:00:00 2001
From: Xue Liu <liuxue@loongson.cn>
Date: Thu, 1 Dec 2022 18:37:21 +0800
Subject: [PATCH] barrier: LOONGARCH memory barriers

Implement memory barrier for LOONGARCH platforms.

Change-Id: I44f5e63e6eb3f8bf98e965a22fb86f94e727061d
Signed-off-by: Xue Liu <liuxue@loongson.cn>
Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/16082
Community-CI: Mellanox Build Bot
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: Jim Harris <james.r.harris@intel.com>
Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
---
 include/spdk/barrier.h | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/include/spdk/barrier.h b/include/spdk/barrier.h
index 17fb05ba6..0cf547b2d 100644
--- a/include/spdk/barrier.h
+++ b/include/spdk/barrier.h
@@ -85,6 +85,16 @@ extern "C" {
 #define _spdk_smp_mb()	__asm__ __volatile__("fence rw, rw" ::: "memory")
 #define _spdk_ivdt_dcache(pdata)
 
+#elif defined(__loongarch__)
+
+#define _spdk_rmb()	__asm volatile("dbar 0" ::: "memory")
+#define _spdk_wmb()	__asm volatile("dbar 0" ::: "memory")
+#define _spdk_mb()	__asm volatile("dbar 0" ::: "memory")
+#define _spdk_smp_rmb()	__asm volatile("dbar 0" ::: "memory")
+#define _spdk_smp_wmb()	__asm volatile("dbar 0" ::: "memory")
+#define _spdk_smp_mb()	__asm volatile("dbar 0" ::: "memory")
+#define _spdk_ivdt_dcache(pdata)
+
 #else
 
 #define _spdk_rmb()