rdma: set the number of wr sge_entries per I/O
This was not being properly set in the multi-sgl path. Also add a verification step to the fio configuration file to prevent against future regressions. Change-Id: I510b6acd92bc2fbc9b6fbec1d59945cc53584ad3 Signed-off-by: Seth Howell <seth.howell@intel.com> Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/450305 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com>
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@ -3,14 +3,14 @@ ioengine=spdk
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thread=1
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thread=1
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group_reporting=1
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group_reporting=1
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direct=1
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direct=1
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verify=0
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enable_sgl=1
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enable_sgl=1
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time_based=1
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time_based=1
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ramp_time=0
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ramp_time=0
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runtime=2
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runtime=2
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iodepth=4
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iodepth=128
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rw=randrw
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rw=randrw
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bs=16k
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bs=16k
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verify=md5
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[test]
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[test]
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numjobs=1
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numjobs=1
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@ -1497,6 +1497,7 @@ nvmf_rdma_fill_buffers(struct spdk_nvmf_rdma_transport *rtransport,
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}
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}
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i++;
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i++;
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}
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}
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wr->num_sge = i;
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return 0;
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return 0;
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}
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}
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@ -96,6 +96,7 @@ fi
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trap - SIGINT SIGTERM EXIT
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trap - SIGINT SIGTERM EXIT
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rm -f ./local-test-0-verify.state
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killprocess $nvmfpid
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killprocess $nvmfpid
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nvmftestfini $1
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nvmftestfini $1
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timing_exit fio
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timing_exit fio
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