diff --git a/lib/nvme/nvme_ctrlr.c b/lib/nvme/nvme_ctrlr.c
index a031c04f3..a091b5d3c 100644
--- a/lib/nvme/nvme_ctrlr.c
+++ b/lib/nvme/nvme_ctrlr.c
@@ -2720,9 +2720,7 @@ nvme_ctrlr_identify_id_desc_namespaces(struct spdk_nvme_ctrlr *ctrlr)
 static void
 nvme_ctrlr_update_nvmf_ioccsz(struct spdk_nvme_ctrlr *ctrlr)
 {
-	if (ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_RDMA ||
-	    ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_TCP ||
-	    ctrlr->trid.trtype == SPDK_NVME_TRANSPORT_FC) {
+	if (spdk_nvme_ctrlr_is_fabrics(ctrlr)) {
 		if (ctrlr->cdata.nvmf_specific.ioccsz < 4) {
 			NVME_CTRLR_ERRLOG(ctrlr, "Incorrect IOCCSZ %u, the minimum value should be 4\n",
 					  ctrlr->cdata.nvmf_specific.ioccsz);
diff --git a/test/unit/lib/nvme/nvme_ctrlr.c/nvme_ctrlr_ut.c b/test/unit/lib/nvme/nvme_ctrlr.c/nvme_ctrlr_ut.c
index 0e05b62ce..9ba013890 100644
--- a/test/unit/lib/nvme/nvme_ctrlr.c/nvme_ctrlr_ut.c
+++ b/test/unit/lib/nvme/nvme_ctrlr.c/nvme_ctrlr_ut.c
@@ -679,7 +679,8 @@ spdk_pci_device_detach(struct spdk_pci_device *device)
 						\
 	STAILQ_INIT(&adminq.free_req);		\
 	STAILQ_INSERT_HEAD(&adminq.free_req, &req, stailq);	\
-	ctrlr.adminq = &adminq;
+	ctrlr.adminq = &adminq;					\
+	ctrlr.trid.trtype = SPDK_NVME_TRANSPORT_CUSTOM;
 
 static void
 test_nvme_ctrlr_init_en_1_rdy_0(void)
@@ -2462,6 +2463,31 @@ test_nvme_ctrlr_init_set_nvmf_ioccsz(void)
 
 	nvme_ctrlr_destruct(&ctrlr);
 
+	/* Check CUSTOM_FABRICS trtype, */
+	SPDK_CU_ASSERT_FATAL(nvme_ctrlr_construct(&ctrlr) == 0);
+	ctrlr.trid.trtype = SPDK_NVME_TRANSPORT_CUSTOM_FABRICS;
+
+	ctrlr.state = NVME_CTRLR_STATE_IDENTIFY;
+	CU_ASSERT(nvme_ctrlr_process_init(&ctrlr) == 0);
+	CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_CONFIGURE_AER);
+	CU_ASSERT(nvme_ctrlr_process_init(&ctrlr) == 0);
+	CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_SET_KEEP_ALIVE_TIMEOUT);
+	CU_ASSERT(nvme_ctrlr_process_init(&ctrlr) == 0);
+	CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_IDENTIFY_IOCS_SPECIFIC);
+	CU_ASSERT(nvme_ctrlr_process_init(&ctrlr) == 0);
+	CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_SET_NUM_QUEUES);
+	CU_ASSERT(nvme_ctrlr_process_init(&ctrlr) == 0);
+	CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_IDENTIFY_ACTIVE_NS);
+	CU_ASSERT(nvme_ctrlr_process_init(&ctrlr) == 0);
+	CU_ASSERT(ctrlr.state == NVME_CTRLR_STATE_IDENTIFY_NS);
+
+	CU_ASSERT(ctrlr.ioccsz_bytes == 4096);
+	CU_ASSERT(ctrlr.icdoff == 1);
+	ctrlr.ioccsz_bytes = 0;
+	ctrlr.icdoff = 0;
+
+	nvme_ctrlr_destruct(&ctrlr);
+
 	g_cdata = NULL;
 }