nvme_spec.h: update to NVMe 1.3
Sync the spec header with the major changes for NVMe 1.3. Some of the added fields may have been added in previous versions of the spec. Change-Id: Ia50a52f5192cf450bb5cc2d18fcc1f92ebce7f77 Signed-off-by: Daniel Verkamp <daniel.verkamp@intel.com> Reviewed-on: https://review.gerrithub.io/362046 Tested-by: SPDK Automated Test System <sys_sgsw@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com>
This commit is contained in:
Daniel Verkamp
parent
03e0a3027f
commit
149b2754e6
@ -155,7 +155,13 @@ union spdk_nvme_csts_register {
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/** shutdown status */
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uint32_t shst : 2;
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uint32_t reserved1 : 28;
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/** NVM subsystem reset occurred */
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uint32_t nssro : 1;
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/** Processing paused */
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uint32_t pp : 1;
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uint32_t reserved1 : 26;
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} bits;
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};
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SPDK_STATIC_ASSERT(sizeof(union spdk_nvme_csts_register) == 4, "Incorrect size");
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@ -239,6 +245,53 @@ union spdk_nvme_cmbsz_register {
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};
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SPDK_STATIC_ASSERT(sizeof(union spdk_nvme_cmbsz_register) == 4, "Incorrect size");
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/** Boot partition information */
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union spdk_nvme_bpinfo_register {
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uint32_t raw;
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struct {
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/** Boot partition size in 128KB multiples */
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uint32_t bpsz : 15;
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uint32_t reserved1 : 9;
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/**
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* Boot read status
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* 00b: No Boot Partition read operation requested
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* 01b: Boot Partition read in progress
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* 10b: Boot Partition read completed successfully
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* 11b: Error completing Boot Partition read
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*/
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uint32_t brs : 2;
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uint32_t reserved2 : 5;
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/** Active Boot Partition ID */
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uint32_t abpid : 1;
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} bits;
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};
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SPDK_STATIC_ASSERT(sizeof(union spdk_nvme_bpinfo_register) == 4, "Incorrect size");
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/** Boot partition read select */
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union spdk_nvme_bprsel_register {
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uint32_t raw;
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struct {
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/** Boot partition read size in multiples of 4KB */
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uint32_t bprsz : 10;
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/** Boot partition read offset in multiples of 4KB */
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uint32_t bprof : 20;
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uint32_t reserved : 1;
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/** Boot Partition Identifier */
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uint32_t bpid : 1;
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} bits;
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};
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SPDK_STATIC_ASSERT(sizeof(union spdk_nvme_bprsel_register) == 4, "Incorrect size");
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/** Value to write to NSSR to indicate a NVM subsystem reset ("NVMe") */
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#define SPDK_NVME_NSSR_VALUE 0x4E564D65
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struct spdk_nvme_registers {
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/** controller capabilities */
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union spdk_nvme_cap_register cap;
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@ -264,7 +317,17 @@ struct spdk_nvme_registers {
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union spdk_nvme_cmbloc_register cmbloc;
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/** controller memory buffer size */
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union spdk_nvme_cmbsz_register cmbsz;
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uint32_t reserved3[0x3f0];
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/** boot partition information */
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union spdk_nvme_bpinfo_register bpinfo;
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/** boot partition read select */
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union spdk_nvme_bprsel_register bprsel;
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/** boot partition memory buffer location (must be 4KB aligned) */
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uint64_t bpmbl;
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uint32_t reserved3[0x3ec];
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struct {
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uint32_t sq_tdbl; /* submission queue tail doorbell */
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@ -290,6 +353,12 @@ SPDK_STATIC_ASSERT(0x38 == offsetof(struct spdk_nvme_registers, cmbloc),
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"Incorrect register offset");
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SPDK_STATIC_ASSERT(0x3C == offsetof(struct spdk_nvme_registers, cmbsz),
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"Incorrect register offset");
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SPDK_STATIC_ASSERT(0x40 == offsetof(struct spdk_nvme_registers, bpinfo),
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"Incorrect register offset");
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SPDK_STATIC_ASSERT(0x44 == offsetof(struct spdk_nvme_registers, bprsel),
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"Incorrect register offset");
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SPDK_STATIC_ASSERT(0x48 == offsetof(struct spdk_nvme_registers, bpmbl),
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"Incorrect register offset");
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enum spdk_nvme_sgl_descriptor_type {
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SPDK_NVME_SGL_TYPE_DATA_BLOCK = 0x0,
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@ -503,11 +572,17 @@ enum spdk_nvme_generic_command_status_code {
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SPDK_NVME_SC_INVALID_CONTROLLER_MEM_BUF = 0x12,
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SPDK_NVME_SC_INVALID_PRP_OFFSET = 0x13,
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SPDK_NVME_SC_ATOMIC_WRITE_UNIT_EXCEEDED = 0x14,
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SPDK_NVME_SC_OPERATION_DENIED = 0x15,
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SPDK_NVME_SC_INVALID_SGL_OFFSET = 0x16,
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SPDK_NVME_SC_INVALID_SGL_SUBTYPE = 0x17,
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SPDK_NVME_SC_HOSTID_INCONSISTENT_FORMAT = 0x18,
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SPDK_NVME_SC_KEEP_ALIVE_EXPIRED = 0x19,
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SPDK_NVME_SC_KEEP_ALIVE_INVALID = 0x1a,
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SPDK_NVME_SC_ABORTED_PREEMPT = 0x1b,
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SPDK_NVME_SC_SANITIZE_FAILED = 0x1c,
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SPDK_NVME_SC_SANITIZE_IN_PROGRESS = 0x1d,
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SPDK_NVME_SC_SGL_DATA_BLOCK_GRANULARITY_INVALID = 0x1e,
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SPDK_NVME_SC_COMMAND_INVALID_IN_CMB = 0x1f,
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SPDK_NVME_SC_LBA_OUT_OF_RANGE = 0x80,
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SPDK_NVME_SC_CAPACITY_EXCEEDED = 0x81,
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@ -549,6 +624,12 @@ enum spdk_nvme_command_specific_status_code {
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SPDK_NVME_SC_NAMESPACE_NOT_ATTACHED = 0x1a,
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SPDK_NVME_SC_THINPROVISIONING_NOT_SUPPORTED = 0x1b,
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SPDK_NVME_SC_CONTROLLER_LIST_INVALID = 0x1c,
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SPDK_NVME_SC_DEVICE_SELF_TEST_IN_PROGRESS = 0x1d,
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SPDK_NVME_SC_BOOT_PARTITION_WRITE_PROHIBITED = 0x1e,
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SPDK_NVME_SC_INVALID_CTRLR_ID = 0x1f,
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SPDK_NVME_SC_INVALID_SECONDARY_CTRLR_STATE = 0x20,
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SPDK_NVME_SC_INVALID_NUM_CTRLR_RESOURCES = 0x21,
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SPDK_NVME_SC_INVALID_RESOURCE_ID = 0x22,
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SPDK_NVME_SC_CONFLICTING_ATTRIBUTES = 0x80,
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SPDK_NVME_SC_INVALID_PROTECTION_INFO = 0x81,
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@ -591,13 +672,24 @@ enum spdk_nvme_admin_opcode {
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SPDK_NVME_OPC_FIRMWARE_COMMIT = 0x10,
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SPDK_NVME_OPC_FIRMWARE_IMAGE_DOWNLOAD = 0x11,
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SPDK_NVME_OPC_DEVICE_SELF_TEST = 0x14,
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SPDK_NVME_OPC_NS_ATTACHMENT = 0x15,
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SPDK_NVME_OPC_KEEP_ALIVE = 0x18,
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SPDK_NVME_OPC_DIRECTIVE_SEND = 0x19,
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SPDK_NVME_OPC_DIRECTIVE_RECEIVE = 0x1a,
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SPDK_NVME_OPC_VIRTUALIZATION_MANAGEMENT = 0x1c,
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SPDK_NVME_OPC_NVME_MI_SEND = 0x1d,
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SPDK_NVME_OPC_NVME_MI_RECEIVE = 0x1e,
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SPDK_NVME_OPC_DOORBELL_BUFFER_CONFIG = 0x7c,
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SPDK_NVME_OPC_FORMAT_NVM = 0x80,
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SPDK_NVME_OPC_SECURITY_SEND = 0x81,
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SPDK_NVME_OPC_SECURITY_RECEIVE = 0x82,
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SPDK_NVME_OPC_SANITIZE = 0x84,
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};
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/**
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@ -664,8 +756,11 @@ enum spdk_nvme_feat {
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SPDK_NVME_FEAT_ASYNC_EVENT_CONFIGURATION = 0x0B,
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SPDK_NVME_FEAT_AUTONOMOUS_POWER_STATE_TRANSITION = 0x0C,
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SPDK_NVME_FEAT_HOST_MEM_BUFFER = 0x0D,
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SPDK_NVME_FEAT_TIMESTAMP = 0x0E,
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SPDK_NVME_FEAT_KEEP_ALIVE_TIMER = 0x0F,
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/* 0x0C-0x7F - reserved */
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SPDK_NVME_FEAT_HOST_CONTROLLED_THERMAL_MANAGEMENT = 0x10,
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SPDK_NVME_FEAT_NON_OPERATIONAL_POWER_STATE_CONFIG = 0x11,
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SPDK_NVME_FEAT_SOFTWARE_PROGRESS_MARKER = 0x80,
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/* 0x81-0xBF - command set specific */
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SPDK_NVME_FEAT_HOST_IDENTIFIER = 0x81,
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@ -719,6 +814,9 @@ enum spdk_nvme_identify_cns {
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/** List active NSIDs greater than CDW1.NSID */
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SPDK_NVME_IDENTIFY_ACTIVE_NS_LIST = 0x02,
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/** List namespace identification descriptors */
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SPDK_NVME_IDENTIFY_NS_ID_DESCRIPTOR_LIST = 0x03,
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/** List allocated NSIDs greater than CDW1.NSID */
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SPDK_NVME_IDENTIFY_ALLOCATED_NS_LIST = 0x10,
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@ -730,6 +828,12 @@ enum spdk_nvme_identify_cns {
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/** Get list of controllers starting at CDW10.CNTID */
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SPDK_NVME_IDENTIFY_CTRLR_LIST = 0x13,
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/** Get primary controller capabilities structure */
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SPDK_NVME_IDENTIFY_PRIMARY_CTRLR_CAP = 0x14,
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/** Get secondary controller list */
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SPDK_NVME_IDENTIFY_SECONDARY_CTRLR_LIST = 0x15,
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};
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/** NVMe over Fabrics controller model */
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@ -803,11 +907,21 @@ struct __attribute__((packed)) spdk_nvme_ctrlr_data {
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/** controller attributes */
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struct {
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/** Supports 128-bit host identifier */
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uint32_t host_id_exhid_supported: 1;
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uint32_t reserved: 31;
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/** Supports non-operational power state permissive mode */
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uint32_t non_operational_power_state_permissive_mode: 1;
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uint32_t reserved: 30;
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} ctratt;
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uint8_t reserved1[156];
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uint8_t reserved_100[12];
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/** FRU globally unique identifier */
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uint8_t fguid[16];
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uint8_t reserved_128[128];
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/* bytes 256-511: admin command set attributes */
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@ -825,7 +939,22 @@ struct __attribute__((packed)) spdk_nvme_ctrlr_data {
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/* supports ns manage/ns attach commands */
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uint16_t ns_manage : 1;
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uint16_t oacs_rsvd : 12;
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/** Supports device self-test command (SPDK_NVME_OPC_DEVICE_SELF_TEST) */
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uint16_t device_self_test : 1;
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/** Supports SPDK_NVME_OPC_DIRECTIVE_SEND and SPDK_NVME_OPC_DIRECTIVE_RECEIVE */
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uint16_t directives : 1;
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/** Supports NVMe-MI (SPDK_NVME_OPC_NVME_MI_SEND, SPDK_NVME_OPC_NVME_MI_RECEIVE) */
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uint16_t nvme_mi : 1;
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/** Supports SPDK_NVME_OPC_VIRTUALIZATION_MANAGEMENT */
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uint16_t virtualization_management : 1;
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/** Supports SPDK_NVME_OPC_DOORBELL_BUFFER_CONFIG */
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uint16_t doorbell_buffer_config : 1;
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uint16_t oacs_rsvd : 7;
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} oacs;
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/** abort command limit */
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@ -856,7 +985,9 @@ struct __attribute__((packed)) spdk_nvme_ctrlr_data {
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uint8_t celp : 1;
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/* extended data for get log page */
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uint8_t edlp: 1;
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uint8_t lpa_rsvd : 5;
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/** telemetry log pages and notices */
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uint8_t telemetry : 1;
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uint8_t lpa_rsvd : 4;
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} lpa;
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/** error log page entries */
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@ -914,11 +1045,64 @@ struct __attribute__((packed)) spdk_nvme_ctrlr_data {
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uint8_t access_size;
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} rpmbs;
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uint8_t reserved2[4];
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/** extended device self-test time (in minutes) */
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uint16_t edstt;
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/** device self-test options */
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union {
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uint8_t raw;
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struct {
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/** Device supports only one device self-test operation at a time */
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uint8_t one_only : 1;
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uint8_t reserved : 7;
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} bits;
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} dsto;
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/**
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* Firmware update granularity
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*
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* 4KB units
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* 0x00 = no information provided
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* 0xFF = no restriction
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*/
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uint8_t fwug;
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/**
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* Keep Alive Support
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*
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* Granularity of keep alive timer in 100 ms units
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* 0 = keep alive not supported
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*/
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uint16_t kas;
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uint8_t reserved3[190];
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/** Host controlled thermal management attributes */
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union {
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uint16_t raw;
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struct {
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uint16_t supported : 1;
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uint16_t reserved : 15;
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} bits;
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} hctma;
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/** Minimum thermal management temperature */
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uint16_t mntmt;
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/** Maximum thermal management temperature */
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uint16_t mxtmt;
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/** Sanitize capabilities */
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union {
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uint32_t raw;
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struct {
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uint32_t crypto_erase : 1;
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uint32_t block_erase : 1;
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uint32_t overwrite : 1;
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uint32_t reserved : 29;
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} bits;
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} sanicap;
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uint8_t reserved3[180];
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/* bytes 512-703: nvm command set attributes */
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@ -947,7 +1131,8 @@ struct __attribute__((packed)) spdk_nvme_ctrlr_data {
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uint16_t write_zeroes: 1;
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uint16_t set_features_save: 1;
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uint16_t reservations: 1;
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uint16_t reserved: 10;
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uint16_t timestamp: 1;
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uint16_t reserved: 9;
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} oncs;
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/** fused operation support */
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@ -1049,7 +1234,17 @@ struct spdk_nvme_ns_data {
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struct {
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/** thin provisioning */
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uint8_t thin_prov : 1;
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uint8_t reserved1 : 7;
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/** NAWUN, NAWUPF, and NACWU are defined for this namespace */
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uint8_t ns_atomic_write_unit : 1;
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/** Supports Deallocated or Unwritten LBA error for this namespace */
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uint8_t dealloc_or_unwritten_error : 1;
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/** Non-zero NGUID and EUI64 for namespace are never reused */
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uint8_t guid_never_reused : 1;
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uint8_t reserved1 : 4;
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} nsfeat;
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/** number of lba formats */
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@ -1134,7 +1329,8 @@ struct spdk_nvme_ns_data {
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/** supports exclusive access - all registrants */
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uint8_t exclusive_access_all_reg : 1;
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uint8_t reserved : 1;
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/** supports ignore existing key */
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uint8_t ignore_existing_key : 1;
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} rescap;
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uint8_t raw;
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} nsrescap;
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@ -1144,7 +1340,34 @@ struct spdk_nvme_ns_data {
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uint8_t fpi_supported : 1;
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} fpi;
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uint8_t reserved33;
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/** deallocate logical features */
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union {
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uint8_t raw;
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struct {
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/**
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* Value read from deallocated blocks
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*
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* 000b = not reported
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* 001b = all bytes 0x00
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* 010b = all bytes 0xFF
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*
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* \ref spdk_nvme_dealloc_logical_block_read_value
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*/
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uint8_t read_value : 3;
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/** Supports Deallocate bit in Write Zeroes */
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uint8_t write_zero_deallocate : 1;
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/**
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* Guard field behavior for deallocated logical blocks
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* 0: contains 0xFFFF
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* 1: contains CRC for read value
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*/
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uint8_t guard_value : 1;
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uint8_t reserved : 3;
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} bits;
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} dlfeat;
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/** namespace atomic write unit normal */
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uint16_t nawun;
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@ -1164,7 +1387,8 @@ struct spdk_nvme_ns_data {
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/** namespace atomic boundary size power fail */
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uint16_t nabspf;
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uint16_t reserved46;
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/** namespace optimal I/O boundary in logical blocks */
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uint16_t noiob;
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/** NVM capacity */
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uint64_t nvmcap[2];
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@ -1197,6 +1421,20 @@ struct spdk_nvme_ns_data {
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};
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SPDK_STATIC_ASSERT(sizeof(struct spdk_nvme_ns_data) == 4096, "Incorrect size");
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/**
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* Deallocated logical block features - read value
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*/
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enum spdk_nvme_dealloc_logical_block_read_value {
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/** Not reported */
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SPDK_NVME_DEALLOC_NOT_REPORTED = 0,
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/** Deallocated blocks read 0x00 */
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SPDK_NVME_DEALLOC_READ_00 = 1,
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/** Deallocated blocks read 0xFF */
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SPDK_NVME_DEALLOC_READ_FF = 2,
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};
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/**
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* Reservation Type Encoding
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*/
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@ -1463,6 +1701,37 @@ struct spdk_nvme_ns_list {
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};
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SPDK_STATIC_ASSERT(sizeof(struct spdk_nvme_ns_list) == 4096, "Incorrect size");
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/**
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* Namespace identification descriptor type
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*
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* \sa spdk_nvme_ns_id_desc
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*/
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enum spdk_nvme_nidt {
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/** IEEE Extended Unique Identifier */
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SPDK_NVME_NIDT_EUI64 = 0x01,
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|
||||
/** Namespace GUID */
|
||||
SPDK_NVME_NIDT_NGUID = 0x02,
|
||||
|
||||
/** Namespace UUID */
|
||||
SPDK_NVME_NIDT_UUID = 0x03,
|
||||
};
|
||||
|
||||
struct spdk_nvme_ns_id_desc {
|
||||
/** Namespace identifier type */
|
||||
uint8_t nidt;
|
||||
|
||||
/** Namespace identifier length (length of nid field) */
|
||||
uint8_t nidl;
|
||||
|
||||
uint8_t reserved2;
|
||||
uint8_t reserved3;
|
||||
|
||||
/** Namespace identifier */
|
||||
uint8_t nid[];
|
||||
};
|
||||
SPDK_STATIC_ASSERT(sizeof(struct spdk_nvme_ns_id_desc) == 4, "Incorrect size");
|
||||
|
||||
struct spdk_nvme_ctrlr_list {
|
||||
uint16_t ctrlr_count;
|
||||
uint16_t ctrlr_list[2047];
|
||||
|
||||
@ -54,11 +54,19 @@ static const struct nvme_string admin_opcode[] = {
|
||||
{ SPDK_NVME_OPC_NS_MANAGEMENT, "NAMESPACE MANAGEMENT" },
|
||||
{ SPDK_NVME_OPC_FIRMWARE_COMMIT, "FIRMWARE COMMIT" },
|
||||
{ SPDK_NVME_OPC_FIRMWARE_IMAGE_DOWNLOAD, "FIRMWARE IMAGE DOWNLOAD" },
|
||||
{ SPDK_NVME_OPC_DEVICE_SELF_TEST, "DEVICE SELF-TEST" },
|
||||
{ SPDK_NVME_OPC_NS_ATTACHMENT, "NAMESPACE ATTACHMENT" },
|
||||
{ SPDK_NVME_OPC_KEEP_ALIVE, "KEEP ALIVE" },
|
||||
{ SPDK_NVME_OPC_DIRECTIVE_SEND, "DIRECTIVE SEND" },
|
||||
{ SPDK_NVME_OPC_DIRECTIVE_RECEIVE, "DIRECTIVE RECEIVE" },
|
||||
{ SPDK_NVME_OPC_VIRTUALIZATION_MANAGEMENT, "VIRTUALIZATION MANAGEMENT" },
|
||||
{ SPDK_NVME_OPC_NVME_MI_SEND, "NVME-MI SEND" },
|
||||
{ SPDK_NVME_OPC_NVME_MI_RECEIVE, "NVME-MI RECEIVE" },
|
||||
{ SPDK_NVME_OPC_DOORBELL_BUFFER_CONFIG, "DOORBELL BUFFER CONFIG" },
|
||||
{ SPDK_NVME_OPC_FORMAT_NVM, "FORMAT NVM" },
|
||||
{ SPDK_NVME_OPC_SECURITY_SEND, "SECURITY SEND" },
|
||||
{ SPDK_NVME_OPC_SECURITY_RECEIVE, "SECURITY RECEIVE" },
|
||||
{ SPDK_NVME_OPC_SANITIZE, "SANITIZE" },
|
||||
{ 0xFFFF, "ADMIN COMMAND" }
|
||||
};
|
||||
|
||||
@ -171,11 +179,17 @@ static const struct nvme_string generic_status[] = {
|
||||
{ SPDK_NVME_SC_INVALID_CONTROLLER_MEM_BUF, "INVALID CONTROLLER MEMORY BUFFER" },
|
||||
{ SPDK_NVME_SC_INVALID_PRP_OFFSET, "INVALID PRP OFFSET" },
|
||||
{ SPDK_NVME_SC_ATOMIC_WRITE_UNIT_EXCEEDED, "ATOMIC WRITE UNIT EXCEEDED" },
|
||||
{ SPDK_NVME_SC_OPERATION_DENIED, "OPERATION DENIED" },
|
||||
{ SPDK_NVME_SC_INVALID_SGL_OFFSET, "INVALID SGL OFFSET" },
|
||||
{ SPDK_NVME_SC_INVALID_SGL_SUBTYPE, "INVALID SGL SUBTYPE" },
|
||||
{ SPDK_NVME_SC_HOSTID_INCONSISTENT_FORMAT, "HOSTID INCONSISTENT FORMAT" },
|
||||
{ SPDK_NVME_SC_KEEP_ALIVE_EXPIRED, "KEEP ALIVE EXPIRED" },
|
||||
{ SPDK_NVME_SC_KEEP_ALIVE_INVALID, "KEEP ALIVE INVALID" },
|
||||
{ SPDK_NVME_SC_ABORTED_PREEMPT, "ABORTED - PREEMPT AND ABORT" },
|
||||
{ SPDK_NVME_SC_SANITIZE_FAILED, "SANITIZE FAILED" },
|
||||
{ SPDK_NVME_SC_SANITIZE_IN_PROGRESS, "SANITIZE IN PROGRESS" },
|
||||
{ SPDK_NVME_SC_SGL_DATA_BLOCK_GRANULARITY_INVALID, "DATA BLOCK GRANULARITY INVALID" },
|
||||
{ SPDK_NVME_SC_COMMAND_INVALID_IN_CMB, "COMMAND NOT SUPPORTED FOR QUEUE IN CMB" },
|
||||
{ SPDK_NVME_SC_LBA_OUT_OF_RANGE, "LBA OUT OF RANGE" },
|
||||
{ SPDK_NVME_SC_CAPACITY_EXCEEDED, "CAPACITY EXCEEDED" },
|
||||
{ SPDK_NVME_SC_NAMESPACE_NOT_READY, "NAMESPACE NOT READY" },
|
||||
@ -212,6 +226,12 @@ static const struct nvme_string command_specific_status[] = {
|
||||
{ SPDK_NVME_SC_NAMESPACE_NOT_ATTACHED, "NAMESPACE NOT ATTACHED" },
|
||||
{ SPDK_NVME_SC_THINPROVISIONING_NOT_SUPPORTED, "THINPROVISIONING NOT SUPPORTED" },
|
||||
{ SPDK_NVME_SC_CONTROLLER_LIST_INVALID, "CONTROLLER LIST INVALID" },
|
||||
{ SPDK_NVME_SC_DEVICE_SELF_TEST_IN_PROGRESS, "DEVICE SELF-TEST IN PROGRESS" },
|
||||
{ SPDK_NVME_SC_BOOT_PARTITION_WRITE_PROHIBITED, "BOOT PARTITION WRITE PROHIBITED" },
|
||||
{ SPDK_NVME_SC_INVALID_CTRLR_ID, "INVALID CONTROLLER ID" },
|
||||
{ SPDK_NVME_SC_INVALID_SECONDARY_CTRLR_STATE, "INVALID SECONDARY CONTROLLER STATE" },
|
||||
{ SPDK_NVME_SC_INVALID_NUM_CTRLR_RESOURCES, "INVALID NUMBER OF CONTROLLER RESOURCES" },
|
||||
{ SPDK_NVME_SC_INVALID_RESOURCE_ID, "INVALID RESOURCE IDENTIFIER" },
|
||||
{ SPDK_NVME_SC_CONFLICTING_ATTRIBUTES, "CONFLICTING ATTRIBUTES" },
|
||||
{ SPDK_NVME_SC_INVALID_PROTECTION_INFO, "INVALID PROTECTION INFO" },
|
||||
{ SPDK_NVME_SC_ATTEMPTED_WRITE_TO_RO_PAGE, "WRITE TO RO PAGE" },
|
||||
|
||||
Loading…
Reference in New Issue
Block a user