diff --git a/test/common/config/pkgdep/git b/test/common/config/pkgdep/git index 85ef0e92f..f64094a67 100644 --- a/test/common/config/pkgdep/git +++ b/test/common/config/pkgdep/git @@ -155,6 +155,10 @@ function install_qat() { tar -C "$GIT_REPOS/QAT" -xzof - < <(wget -O- "$DRIVER_LOCATION_QAT") + if ge "$kernel_ver" 5.16.0; then + patch --dir="$GIT_REPOS/QAT" -p1 + fi < "$rootdir/test/common/config/pkgdep/patches/qat/0001-dma-mask.patch" + (cd "$GIT_REPOS/QAT" && sudo ./configure --enable-icp-sriov=host && sudo make install) if ! sudo service qat_service start; then diff --git a/test/common/config/pkgdep/patches/qat/0001-dma-mask.patch b/test/common/config/pkgdep/patches/qat/0001-dma-mask.patch new file mode 100644 index 000000000..55895361e --- /dev/null +++ b/test/common/config/pkgdep/patches/qat/0001-dma-mask.patch @@ -0,0 +1,334 @@ +pci_set_dma_mask() and pci_set_consistent_dma_mask() got deprecated in +favor of dma_set_mask_and_coherent(). See: + +https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit?id=c726c62db857d375800af7e82eb1c6f639e87631 + +--- + quickassist/qat/drivers/crypto/qat/qat_200xx/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_200xxvf/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_c3xxx/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_c3xxxvf/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_c4xxx/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_c4xxxvf/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_c62x/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_c62xvf/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_d15xx/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_d15xxvf/adf_drv.c | 8 ++++---- + quickassist/qat/drivers/crypto/qat/qat_dh895xcc/adf_drv.c | 8 ++++---- + .../qat/drivers/crypto/qat/qat_dh895xccvf/adf_drv.c | 8 ++++---- + 12 files changed, 48 insertions(+), 48 deletions(-) + +diff --git a/quickassist/qat/drivers/crypto/qat/qat_200xx/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_200xx/adf_drv.c +index 53cc328..d24f02a 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_200xx/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_200xx/adf_drv.c +@@ -187,17 +187,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48))) { ++ if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_200XX_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_200xxvf/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_200xxvf/adf_drv.c +index e9c9012..cda5b53 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_200xxvf/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_200xxvf/adf_drv.c +@@ -158,17 +158,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48))) { ++ if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_200XXVF_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_c3xxx/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_c3xxx/adf_drv.c +index 26d0485..f31dae6 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_c3xxx/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_c3xxx/adf_drv.c +@@ -190,17 +190,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48))) { ++ if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_C3XXX_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_c3xxxvf/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_c3xxxvf/adf_drv.c +index 13e10eb..631adea 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_c3xxxvf/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_c3xxxvf/adf_drv.c +@@ -158,17 +158,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48))) { ++ if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_C3XXXVF_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_c4xxx/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_c4xxx/adf_drv.c +index 0bd2e9b..ce9022c 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_c4xxx/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_c4xxx/adf_drv.c +@@ -178,17 +178,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48))) { ++ if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_C4XXX_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_c4xxxvf/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_c4xxxvf/adf_drv.c +index b04da31..e95c624 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_c4xxxvf/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_c4xxxvf/adf_drv.c +@@ -157,17 +157,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48))) { ++ if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_C4XXXVF_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_c62x/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_c62x/adf_drv.c +index 27481b8..c360365 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_c62x/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_c62x/adf_drv.c +@@ -181,17 +181,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48))) { ++ if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_C62X_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_c62xvf/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_c62xvf/adf_drv.c +index a5de49b..2b70e52 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_c62xvf/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_c62xvf/adf_drv.c +@@ -163,17 +163,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48))) { ++ if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_C62XVF_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_d15xx/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_d15xx/adf_drv.c +index 294f3f5..7ade965 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_d15xx/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_d15xx/adf_drv.c +@@ -176,17 +176,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48))) { ++ if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_D15XX_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_d15xxvf/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_d15xxvf/adf_drv.c +index 00f8bf3..c3cb22d 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_d15xxvf/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_d15xxvf/adf_drv.c +@@ -158,17 +158,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48))) { ++ if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_D15XXVF_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_dh895xcc/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_dh895xcc/adf_drv.c +index a93855e..314f8c2 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_dh895xcc/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_dh895xcc/adf_drv.c +@@ -176,17 +176,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48))) { ++ if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_DH895XCC_DEVICE_NAME)) { +diff --git a/quickassist/qat/drivers/crypto/qat/qat_dh895xccvf/adf_drv.c b/quickassist/qat/drivers/crypto/qat/qat_dh895xccvf/adf_drv.c +index d17730d..8868ccf 100644 +--- a/quickassist/qat/drivers/crypto/qat/qat_dh895xccvf/adf_drv.c ++++ b/quickassist/qat/drivers/crypto/qat/qat_dh895xccvf/adf_drv.c +@@ -156,17 +156,17 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + } + + /* set dma identifier */ +- if (pci_set_dma_mask(pdev, DMA_BIT_MASK(48))) { +- if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { ++ if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48))) { ++ if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))) { + dev_err(&pdev->dev, "No usable DMA configuration\n"); + ret = -EFAULT; + goto out_err_disable; + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); + } + + } else { +- pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48)); ++ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)); + } + + if (pci_request_regions(pdev, ADF_DH895XCCVF_DEVICE_NAME)) { +-- +