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Spdk/module/accel/dsa/accel_dsa.h

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Replace most BSD 3-clause license text with SPDX identifier. Many open source projects have moved to using SPDX identifiers to specify license information, reducing the amount of boilerplate code in every source file. This patch replaces the bulk of SPDK .c, .cpp and Makefiles with the BSD-3-Clause identifier. Almost all of these files share the exact same license text, and this patch only modifies the files that contain the most common license text. There can be slight variations because the third clause contains company names - most say "Intel Corporation", but there are instances for Nvidia, Samsung, Eideticom and even "the copyright holder". Used a bash script to automate replacement of the license text with SPDX identifier which is checked into scripts/spdx.sh. Signed-off-by: Jim Harris <james.r.harris@intel.com> Change-Id: Iaa88ab5e92ea471691dc298cfe41ebfb5d169780 Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/12904 Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com> Community-CI: Mellanox Build Bot Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Aleksey Marchuk <alexeymar@nvidia.com> Reviewed-by: Changpeng Liu <changpeng.liu@intel.com> Reviewed-by: Dong Yi <dongx.yi@intel.com> Reviewed-by: Konrad Sztyber <konrad.sztyber@intel.com> Reviewed-by: Paul Luse <paul.e.luse@intel.com> Reviewed-by: <qun.wan@intel.com>
2022-06-03 19:15:11 +00:00
/* SPDX-License-Identifier: BSD-3-Clause
update Intel copyright notices per Intel policy to include file commit date using git cmd below. The policy does not apply to non-Intel (C) notices. git log --follow -C90% --format=%ad --date default <file> | tail -1 and then pull just the 4 digit year from the result. Intel copyrights were not added to files where Intel either had no contribution ot the contribution lacked substance (ie license header updates, formatting changes, etc). Contribution date used "--follow -C95%" to get the most accurate date. Note that several files in this patch didn't end the license/(c) block with a blank comment line so these were added as the vast majority of files do have this last blank line. Simply there for consistency. Signed-off-by: paul luse <paul.e.luse@intel.com> Change-Id: Id5b7ce4f658fe87132f14139ead58d6e285c04d4 Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/15192 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Community-CI: Mellanox Build Bot
2022-11-01 20:26:26 +00:00
* Copyright (C) 2022 Intel Corporation.
module/idxd: accel framework plug-in for idxd Docs, RPC, unit tests, etc., will follow. Notes: * The current implementation will only work with VFIO. * The current implementation supports only the existing accel framework API. The API will be expanded for DSA exclusive features in a subsequent patch. * SW is required to manage flow control, to not over-run the work queues. This is provided in the accel plug-in module. The upper layers use public API to manage this. * As we need to support any number of channels (we can't limit ourselves to the number of work queues) we need to dynamically size/resize our per channel descriptor rings based on the number of current channels. This is done from upper layers via public API into the lib. * As channels are created, the total number of work queue slots is divided across the channels evenly. Same thing when they are destroyed, remaining channels will see the ring sizes increase. This is done from upper layers via public API into the lib. Signed-off-by: paul luse <paul.e.luse@intel.com> Change-Id: Ifaa39935107206a2d990cec992854675e5502057 Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/1722 Community-CI: Mellanox Build Bot Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
2020-04-07 16:38:58 +00:00
* All rights reserved.
*/
modules/accel_dsa: update IDXD references to DSA where it makes sense IDXD has always been used everywhere but technically it stands for the driver, not the HW (Intel Data Streaming Accelerator Driver) where the X comes from "Streaming Accelerator" somehow. Anyway, the underlying hardware is just DSA. It doesn't matter much now but upcoming patches will add support for a new HW accelerator called the Intel In-Memory Analytics Accelerator which we'll call IAA and it will use the same (mostly) device driver (IDXD) as DSA. So, calling the HW what it is will lessen confusion when adding IAA support. This patch just does renaming for the accel_fw module and associated files (RPC, etc). Signed-off-by: paul luse <paul.e.luse@intel.com> Change-Id: Ib3b1f982cc60359ecfea5dbcbeeb33e4d69aee6a Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/11984 Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com> Community-CI: Mellanox Build Bot Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
2022-03-18 14:29:39 +00:00
#ifndef SPDK_ACCEL_ENGINE_DSA_H
#define SPDK_ACCEL_ENGINE_DSA_H
module/idxd: accel framework plug-in for idxd Docs, RPC, unit tests, etc., will follow. Notes: * The current implementation will only work with VFIO. * The current implementation supports only the existing accel framework API. The API will be expanded for DSA exclusive features in a subsequent patch. * SW is required to manage flow control, to not over-run the work queues. This is provided in the accel plug-in module. The upper layers use public API to manage this. * As we need to support any number of channels (we can't limit ourselves to the number of work queues) we need to dynamically size/resize our per channel descriptor rings based on the number of current channels. This is done from upper layers via public API into the lib. * As channels are created, the total number of work queue slots is divided across the channels evenly. Same thing when they are destroyed, remaining channels will see the ring sizes increase. This is done from upper layers via public API into the lib. Signed-off-by: paul luse <paul.e.luse@intel.com> Change-Id: Ifaa39935107206a2d990cec992854675e5502057 Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/1722 Community-CI: Mellanox Build Bot Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
2020-04-07 16:38:58 +00:00
#include "spdk/stdinc.h"
accel: Refer to plugins as 'modules' instead of 'engines' This is consistent with the use of terms in other parts of SPDK and fits with the code living under module/ Change-Id: If182f7cf2d160d57443a1b5f24e0065f191b59b2 Signed-off-by: Ben Walker <benjamin.walker@intel.com> Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/13919 Tested-by: SPDK CI Jenkins <sys_sgci@intel.com> Community-CI: Mellanox Build Bot Reviewed-by: Aleksey Marchuk <alexeymar@nvidia.com> Reviewed-by: Jim Harris <james.r.harris@intel.com>
2022-08-08 21:43:24 +00:00
void accel_dsa_enable_probe(bool kernel_mode);
module/idxd: accel framework plug-in for idxd Docs, RPC, unit tests, etc., will follow. Notes: * The current implementation will only work with VFIO. * The current implementation supports only the existing accel framework API. The API will be expanded for DSA exclusive features in a subsequent patch. * SW is required to manage flow control, to not over-run the work queues. This is provided in the accel plug-in module. The upper layers use public API to manage this. * As we need to support any number of channels (we can't limit ourselves to the number of work queues) we need to dynamically size/resize our per channel descriptor rings based on the number of current channels. This is done from upper layers via public API into the lib. * As channels are created, the total number of work queue slots is divided across the channels evenly. Same thing when they are destroyed, remaining channels will see the ring sizes increase. This is done from upper layers via public API into the lib. Signed-off-by: paul luse <paul.e.luse@intel.com> Change-Id: Ifaa39935107206a2d990cec992854675e5502057 Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/1722 Community-CI: Mellanox Build Bot Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
2020-04-07 16:38:58 +00:00
modules/accel_dsa: update IDXD references to DSA where it makes sense IDXD has always been used everywhere but technically it stands for the driver, not the HW (Intel Data Streaming Accelerator Driver) where the X comes from "Streaming Accelerator" somehow. Anyway, the underlying hardware is just DSA. It doesn't matter much now but upcoming patches will add support for a new HW accelerator called the Intel In-Memory Analytics Accelerator which we'll call IAA and it will use the same (mostly) device driver (IDXD) as DSA. So, calling the HW what it is will lessen confusion when adding IAA support. This patch just does renaming for the accel_fw module and associated files (RPC, etc). Signed-off-by: paul luse <paul.e.luse@intel.com> Change-Id: Ib3b1f982cc60359ecfea5dbcbeeb33e4d69aee6a Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/11984 Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Ben Walker <benjamin.walker@intel.com> Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com> Community-CI: Mellanox Build Bot Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
2022-03-18 14:29:39 +00:00
#endif /* SPDK_ACCEL_ENGINE_DSA_H */
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